; given address of 32 bit little-endian counter in W, ; increment or decrement the counter and return Z set if zero ;Inc32z ;From Dmitry Kiryashov inc32z: movwf FSR clrz incfsz INDF,F return incfsz FSR,F incfsz INDF,F return incfsz FSR,F incfsz INDF,F return incfsz FSR,F incf INDF,F return
;Dec32z ;From Rich Leggitt, Andrew Warren, and Dmitry Kiryashov ; 99.2% of the time, this takes 10 cycles w/call dec32z: movwf FSR decfsz INDF,F goto dec32nz incf FSR,F movfw INDF incf FSR,F iorwf INDF,W incf FSR,F iorwf INDF,W ;get _Z finally return dec32nz: clrz ;set _Z=0 incfsz INDF,W return incfsz FSR,F ;doesn't corrupt _Z decfsz INDF,F incfsz INDF,W return incfsz FSR,F ;... decfsz INDF,F incfsz INDF,W return incfsz FSR,F ;... decfsz INDF,F return return ;for the 18cxxx instruction set. ;From Scott Dattalo ; 10-16 cycles dec32: movwf FSR0L ; the fsr's (three of them) on the 18cxxx clrf FSR0H ; are 16bits wide decf POSTINC0,F,1 ;Indirect access that increments the fsr. bnz dec32nz ;this was bz ;The lsbyte is zero , so we don't need to propogate the borrow ;but we need to see if the higher bytes are zero. movf POSTINC0,w,1 ;The first byte is zero iorwf POSTINC0,w,1 ;check the next three iorwf POSTINC0,w,1 return dec32nz ;decf on the 18cxxx parts affects C skpnc return decf POSINC0,F,1 skpc decf POSTINC0,F,1 skpc decf POSTINC0,F,1 clrz ;was setz return
file: /Techref/microchip/math/incdec/32bitwz.htm, 2KB, , updated: 2000/2/11 14:56, local time: 2024/12/13 04:08,
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