BIOS Serial UART Driver Routines

REF: PC Magizine Vol 10 No 8 Pg 178

"The 16550A UART: Breaking Old Bottlenecks"

The NS16550AF UART (Universal Asychtonous Receiver/Transmitter) contains two 16-byte FIFO (first in, first out) buffers vice the one byte register on the 8250 UART used in most machines. Systems with the newer chip may take advantage of it by activating the buffered mode as shown in the figure below. Slower machines using fast modems need these buffers, as do faster machines that attempt to run other programs in a multitasking mode while using asynchronous communications.

The buffers reduce the interrupt activity of the CPU because they can hold more data before generating an interrupt to request a transfer. This makes it easier for slower CPUs to avoid dropping characters when they receive a fast stream of data. The buffer may be set to receive 1, 4, 8, or 14 characters before the UART generates an interrupt.

Be aware that the plain 16550 (vice the 16550A) was flawed and will not work correctly if the FIFO buffers are activated. Also, some communications programs written before the introduction of the 16550A might lock up when the UART activates the previously unused upper bits of the Interrupt ID Register

        JMP  Start

U16550A:DB ' 16550A UART $'
U8250: DB ' 8250 UART $'

Start:  MOV  DX,03F8           ; PORT ADDRESS   - 0040:0000
        ADD  DX,+02            ; set offset to Interrupt ID Register
        MOV  AL,C1             ; set receive buffer to 14 and enable
        OUT  DX,AL             ; change the 14  = 0x0c to 1,4,or 8
        XOR  AX,AX
        IN   AL,DX
        PUSH AX

        AND  AL,C0             ; set up for 16550A UART
        CMP  AL,C0             ; is it a 16550A ?
        JNZ  No                ; no

Yes: LEA  DX,U16550A        ; yes
        JMP  StrOut

No: LEA  DX,U8250        ; print either 16550 or 8250

StrOut: MOV  AH,09
        INT  21

        POP  AX
        MOV  AH,4C             ; show the IIR setup as errorlevel
        INT  21
        RET



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