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'[Bulk] Re: [PIC] .hex format for PIC18?'
2009\03\28@092307 by Isaac Marino Bavaresco

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Tamas Rudnai escreveu:
{Quote hidden}

It is not possible to generate an invalid branch or goto instruction,
because the instruction encoding stores the number of *instructions*
(not bytes) offset (for branches) or target address (for goto).

If you try to do a "bra $+1" you will get a compile (assembly) time
error, because the offset needs to be divided by two to generate the
instruction word and the LSB must be zero.

Regards,

Isaaac

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2009\03\28@093705 by Tamas Rudnai

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On Sat, Mar 28, 2009 at 1:23 PM, Isaac Marino Bavaresco <
.....isaacbavarescoKILLspamspam@spam@yahoo.com.br> wrote:

> It is not possible to generate an invalid branch or goto instruction,
> because the instruction encoding stores the number of *instructions*
> (not bytes) offset (for branches) or target address (for goto).
>
> If you try to do a "bra 1" you will get a compile (assembly) time
> error, because the offset needs to be divided by two to generate the
> instruction word and the LSB must be zero.
>

Yes, you are right, what I meant is if you make mistake on a computed goto
(ADDWF PCL style) which would address odd addresses then the PIC resets. I
have not tried what would happen if you jump into a middle of double word
instruction.

Thanks
Tamas
--
http://www.mcuhobby.com

2009\03\28@094936 by olin piclist

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Tamas Rudnai wrote:
> I have not tried what would happen if you jump into a middle
> of double word instruction.

You can't.  There is no such thing as a odd execution addres since the low
bit of the PC is not implemented, or you can think of it as being hard wired
to 0.


********************************************************************
Embed Inc, Littleton Massachusetts, http://www.embedinc.com/products
(978) 742-9014.  Gold level PIC consultants since 2000.

2009\03\28@102633 by Tamas Rudnai

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On Sat, Mar 28, 2009 at 1:50 PM, Olin Lathrop <olin_piclistspamKILLspamembedinc.com>wrote:

> > I have not tried what would happen if you jump into a middle
> > of double word instruction.
>
> You can't.  There is no such thing as a odd execution addres since the low
> bit of the PC is not implemented, or you can think of it as being hard
> wired
> to 0.


I see. What I was wonderin, however, if you have a 4 byte instruction, like
GOTO or CALL, or MOVFF in a jump table, and you are addressing to the middle
would cause any problems. Lets say the jump table starts at 0x200 so the
first GOTO is at 0x200, then 0x204, 0x208 etc and you jump into 0x203. As
you said ths 0. bit is always zero so it jumps into 0x202 which is still in
the middle of goto, but that one is implemented as NOP, so no big surprise
happens during the execusion:
                                                 41:    start
 0580    0E00     MOVLW 0                        42:            movlw
upper(jmptbl)
 0582    6EFB     MOVWF 0xffb, ACCESS            43:            movwf
PCLATU
 0584    0E02     MOVLW 0x2                      44:            movlw
high(jmptbl)
 0586    6EFA     MOVWF 0xffa, ACCESS            45:            movwf
PCLATH
 0588    0E03     MOVLW 0x3                      46:            movlw
jmptbl+3
 058A    6EF9     MOVWF 0xff9, ACCESS            47:            movwf
PCL
                                                 48:
                                                 49:    jmptbl    code
0x200
                                                 50:    jmptbl
 0200    EFC0     GOTO 0x580                     51:            goto
start
 0202    F002     NOP
 0204    ECC0     CALL 0x580, 0                  52:            call
start
 0206    F002     NOP
 0208    C020     MOVFF 0x20, 0xf80              53:            movff
0x20, PORTA
 020A    FF80     NOP

I am always suprprise how well PICs are designed. The only small
modification I would have do is to causing a reset when 0xFxxx NOP is
executed so such kind of software errors could have been determined faster.

Tamas
--
http://www.mcuhobby.com

2009\03\28@103634 by peter green

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> I am always suprprise how well PICs are designed. The only small
> modification I would have do is to causing a reset when 0xFxxx NOP is
> executed so such kind of software errors could have been determined faster.
>  
I suspect the reason they made the second byte of two byte instructions
act as a NOP was to allow BTFSS and BTFSC to be used with a two byte
instruction.

2009\03\28@110743 by Jan-Erik Soderholm

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Tamas Rudnai wrote:

>
> I see. What I was wonderin, however, if you have a 4 byte instruction, like
> GOTO or CALL, or MOVFF in a jump table, and you are addressing to the middle
> would cause any problems...

From one 18F datasheet (I would guess *any* 18F datasheet) :

"If this second word is executed as an instruction (by
itself), it will execute as a NOP."

> The only small
> modification I would have do is to causing a reset when 0xFxxx NOP is
> executed so such kind of software errors could have been determined faster.
>
> Tamas

But that would cause a reset everytime you have a "skip"
instruction right before a 2-word instruction. Note that
the skip only skips the first half of the 2-word instruction
and then execute the second half as a NOP...

Jan-Erik.

2009\03\28@112844 by olin piclist

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Tamas Rudnai wrote:
> I see. What I was wonderin, however, if you have a 4 byte
> instruction, like GOTO or CALL, or MOVFF in a jump table, and you are
> addressing to the middle would cause any problems.

No, since the second word of two-word instructions always decode to NOP by
themselves.  This was done deliberately so that you can use the SKIP
instructions with GOTO following them.


********************************************************************
Embed Inc, Littleton Massachusetts, http://www.embedinc.com/products
(978) 742-9014.  Gold level PIC consultants since 2000.

2009\03\28@113529 by Tamas Rudnai

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On Sat, Mar 28, 2009 at 3:06 PM, Jan-Erik Soderholm <
.....jan-erik.soderholmKILLspamspam.....telia.com> wrote:

> But that would cause a reset everytime you have a "skip"
> instruction right before a 2-word instruction. Note that
> the skip only skips the first half of the 2-word instruction
> and then execute the second half as a NOP...
>

Makes perfect sense.

Tamas
--
http://www.mcuhobby.com

2009\03\28@175135 by Bob Ammerman

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> I am always suprprise how well PICs are designed. The only small
> modification I would have do is to causing a reset when 0xFxxx NOP is
> executed so such kind of software errors could have been determined
> faster.
>
> Tamas

It's not really an error to execute the 2nd half of a GOTO/MOVFF etc as a
NOP. It allows such an instruction to follow a skip:


   BTFSS    something,somebit
   GOTO    someplace

-- Bob Ammerman
RAm Systems

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