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PICList Thread
'[PIC]: Sleep power & wake-up'
2002\03\09@171713 by Dale Botkin

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Hi,

I've got a puzzle involving a 12CE674, but applicable to most PICs.  I
want to put the PIC to sleep drawing as little power as possible, and wake
up on a pin change.  I can turn on the internal weak pull-ups, enable
interrupt in pin change, go to sleep, ground a pin, everything works
great.  Unfortunately, the current draw is about 700uA with my JW test
mule!  This thing will sit for weeks at a time (maybe longer) on 2 or 3 AA
bateries, and I don't want it killing the batteries while it's asleep.
Yes, I have WDT and the ADC off and everything, it's just the weak pullups
that are sucking electrons, I turn off internal pullups and current drops
WAY down.

So I figure maybe I can make the pins outputs, drive 'em high and a
momentary ground will wake them up, since the interrupt on change looks at
the pin "past" the output drivers -- no joy, of course (yeah, I know it
was a dumb idea).  The good news is, sleep current is close to zero.  Bad
news is, grounding the pin causes 23mA current draw but no wakeup.

I'd like to do this without using an external pullup resistor if at all
possible, but it's not looking too good right now.  Any more ideas?

Dale
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2002\03\09@173624 by Dwayne Reid

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At 04:16 PM 3/9/02 -0600, Dale Botkin wrote:
>Hi,
>
>I've got a puzzle involving a 12CE674, but applicable to most PICs.  I
>want to put the PIC to sleep drawing as little power as possible, and wake
>up on a pin change.  I can turn on the internal weak pull-ups, enable
>interrupt in pin change, go to sleep, ground a pin, everything works
>great.  Unfortunately, the current draw is about 700uA with my JW test
>mule!  This thing will sit for weeks at a time (maybe longer) on 2 or 3 AA
>bateries, and I don't want it killing the batteries while it's asleep.
>Yes, I have WDT and the ADC off and everything, it's just the weak pullups
>that are sucking electrons, I turn off internal pullups and current drops
>WAY down.

Did you cover the window?  Try adding high value pull-up resistors 1 at at
time to the pins while monitoring the supply current while in sleep.  Are
you sure the internal pull-ups are enabled?  Use a really high impedance
meter to measure the pin voltage or use a DMM but measure from the pin to
both VDD and GND (all the while looking at the supply current).   Look for
leakage paths: what you are seeing could be the result of sneak leakage
currents bringing the pin voltage part way down from VDD and thus into the
linear region.  Adding strong pull-ups one at a time to the pins while
monitoring supply current will help identify this.

Did you disable BOD?

You should be able to get down to less than 20 uA - I have done so with the
12ce673.

dwayne


Dwayne Reid   <spam_OUTdwaynerTakeThisOuTspamplanet.eon.net>
Trinity Electronics Systems Ltd    Edmonton, AB, CANADA
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2002\03\09@174501 by David Koski

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Why not just use an external pullup?  You are right about the internal pullups
drawing too much.

David

On Sat, 9 Mar 2002 16:16:32 -0600
Dale Botkin <.....daleKILLspamspam@spam@BOTKIN.ORG> wrote:

{Quote hidden}

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2002\03\09@180546 by Dale Botkin

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On Sat, 9 Mar 2002, David Koski wrote:

> Why not just use an external pullup?  You are right about the internal pullups
> drawing too much.

At this point it's just trying to figure out what I'm not doing right.
The resistors aren't that big a deal, I just want to see if I can get the
parts count down to an absolute minumum.

Dale

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2002\03\09@181456 by Dale Botkin

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On Sat, 9 Mar 2002, Dwayne Reid wrote:

> Did you cover the window?
Yep.

> Try adding high value pull-up resistors 1 at at time to the pins while
> monitoring the supply current while in sleep.  Are you sure the
> internal pull-ups are enabled?

Yep.

> Use a really high impedance meter to measure the pin voltage or use a
> DMM but measure from the pin to both VDD and GND (all the while
> looking at the supply current).  Look for leakage paths: what you are
> seeing could be the result of sneak leakage currents bringing the pin
> voltage part way down from VDD and thus into the linear region.
> Adding strong pull-ups one at a time to the pins while monitoring
> supply current will help identify this.

Ain't nuthin' there to do it.  GP0 & 1 are open switch inputs, GP2 is set
to output and driven low to an LED & resistor to GND.  GP3-5 are open, set
as outputs and driven low.  I can leave all the pins open, same result.

> Did you disable BOD?

I would have if the 12CE67x had BOD ;)

> You should be able to get down to less than 20 uA - I have done so with the
> 12ce673.

I think I just got it there.  Made a code change to drive GP1 as a low
output and leave GP0 as an input, and the sleep current dropped like a
rock.  Reads 0.00 on my Fluke 77 meter, which means it's low enough.  I
have to wonder if my well-used 12CE673-JW had a flaky output drive on GP1.
I also think it may have been waking up as soon as it went to sleep but
not sure -- if it was it should have given me an indication by turning an
output on, which it didn't, but the 700uA is suspiciously close to what it
draws with all the outputs disconnected and the PIC not sleeping.

At any rate, it seems to be working as expected now with sleep current too
low to measure with my meter, so all's well!  8-)

Dale

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2002\03\09@184356 by Olin Lathrop

face picon face
> I've got a puzzle involving a 12CE674, but applicable to most PICs.  I
> want to put the PIC to sleep drawing as little power as possible, and wake
> up on a pin change.  I can turn on the internal weak pull-ups, enable
> interrupt in pin change, go to sleep, ground a pin, everything works
> great.  Unfortunately, the current draw is about 700uA with my JW test
> mule!  This thing will sit for weeks at a time (maybe longer) on 2 or 3 AA
> bateries, and I don't want it killing the batteries while it's asleep.
> Yes, I have WDT and the ADC off and everything, it's just the weak pullups
> that are sucking electrons, I turn off internal pullups and current drops
> WAY down.

Something doesn't sound right.  The weak pullups shouldn't be drawing much
current as long at the external circuit lets the lines float high.  Are one
or more of the port B pins held low during sleep?


********************************************************************
Olin Lathrop, embedded systems consultant in Littleton Massachusetts
(978) 742-9014, olinspamKILLspamembedinc.com, http://www.embedinc.com

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2002\03\09@184958 by David Koski

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On Sat, 9 Mar 2002 17:04:58 -0600
Dale Botkin <.....daleKILLspamspam.....BOTKIN.ORG> wrote:

> On Sat, 9 Mar 2002, David Koski wrote:
>
> > Why not just use an external pullup?  You are right about the internal
pullups
> > drawing too much.
>
> At this point it's just trying to figure out what I'm not doing right.
> The resistors aren't that big a deal, I just want to see if I can get the
> parts count down to an absolute minumum.

I might be missing something but I don't see how you will beat your original
idea with only using external pullups instead.  It is unfortunate that the
internals suck so much power.  Is a contact switch driving the input?

David

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2002\03\09@185215 by Bob Ammerman

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Dale,

Turning on the internal pullups should _not_ result in such a jump in
current draw, unless one or more of the pins is connected via a not very
large resistance to ground.

Is one of the other pins, beside the one you are trying to use for wakeup,
pulling a pin down?

Bob Ammerman
RAm Systems

{Original Message removed}

2002\03\09@195712 by David Koski

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I would like to know if anyone has actually accomplished reasonable power drain
using internal pullups, how much power was consumed, and how it was
accomplished.

David Koski
EraseMEdavidspam_OUTspamTakeThisOuTKosmosIsland.com

On Sat, 9 Mar 2002 18:50:28 -0800
Bob Ammerman <rammermanspamspam_OUTADELPHIA.NET> wrote:

{Quote hidden}

> {Original Message removed}

2002\03\09@205427 by Dale Botkin

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On Sat, 9 Mar 2002, Bob Ammerman wrote:

> Turning on the internal pullups should _not_ result in such a jump in
> current draw, unless one or more of the pins is connected via a not very
> large resistance to ground.

Well, the data sheet says max 400uA.  It doesn't specifically say total or
per pin.  Even 400uA is a little more than I'd like to see, though.
We're talking about AA batteries, and I'd like to not see them drained.
Yeah, sure, I *could* just add a SPST slide power switch, but where's the
fun in that?  Heck, that'd be like switching AC with a relay!  8-D

I guess it's kind of an academic exercise, really.  This is a one-off, but
I'm lookig at it from a commercial perspective to see how low I could get
the per-unit cost in production and still have it operate reliably.  Old
habits die hard, I guess.  Not just parts cost, but board space and
assembly cost too...  the ideal design is one component.  I've got this
one down to one PIC, one resistor, one NPN transistor and an optional (but
recommended) cap.

> Is one of the other pins, beside the one you are trying to use for wakeup,
> pulling a pin down?

I suspect my GP1 pin is flaky on the -JW part I have.  When I set it as a
HI output and leave GP1 as an open input the current consumption in sleep
mode goes WAY, WAY down.  Below where my meter can read it, which is low
enough for me.  I may have to break down and replace my EPROM chip.  It's
spent enough time in the eraser it's got a nice tan though!  ;)

Dale

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2002\03\09@210304 by Dale Botkin

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On Sat, 9 Mar 2002, David Koski wrote:

> I would like to know if anyone has actually accomplished reasonable power drain
> using internal pullups, how much power was consumed, and how it was
> accomplished.

Depends on what you call "reasonable".  If I had a better meter I could
tell you what mine's at now, but it meets my criteria for reasonable.

Datasheet says typical supply current is .4 to 2.1mA max with INTRC (which
I'm using) at 2.5Vdd (I'm at about 4-4.5V).  When awake but idling, no
loads connected, my Fluke says 700uA.  When it goes to sleep, data sheet
says .2 to 5 uA, my meter says 0.00 - meaning it's below 10uA, anyway.

Dale

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2002\03\10@083029 by Bob Ammerman

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Dale,

To read really, really, low sleep currents this is what I do:

1. Put a 1K resistor in series with the power supply, and connect a
multimeter in voltage mode across it.

2. Clip a jumper on to short out the 1K resistor

3. Turn on power and get the unit into sleep mode.

4. Remove the jumper across the 1K resistor.

5. Now you can read the current on the meter scalled at 1 mv per uA.

[you can use a 10K R to get 10x the resolution, but then the scaling is 10mv
per uA]

Bob Ammerman
RAm Systems


{Original Message removed}


'[EE]: using cat-5 ethernet for power & rs-485'
2002\05\10@032012 by Jesse Lackey
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Hello all,

I'm researching how to control possibly 640 strobe or LED bundle lights
via computer.  These will go on the outside of a building.

Leaving the circuitry aside for now (PIC + whatnot), in order to keep
wiring sane I'd like to use just one cable of a commonly used type
(cheaper).

The current idea is to daisy-chain 16 together (spaced at 4' intervals)
with ethernet, using 2 pairs for transmit/receive rs-485, and the other
2 pairs for power (say 12v) and ground.  Cat-5 is available in
ruggedized outdoor, exposed-to-the-sun versions.

The AWG specified for the cables I'm looking at is 24 (pure copper).
There is no mention of how much power can go thru each wire, or pair, or
thru the RJ-45 connector for that matter.  28.6Ohms DC resistance for
1000ft is specified.

So each module will have an RJ-45 "in", and an RJ-45 "out", and 4' of
cable between.  The run from the first one to the rs-485 + power supply
inside will be longer of course (maybe 25').

I couldn't find a current-capacity for given AWG table anywhere.  Help?
Also, does this seem like a reasonable plan in general?  The data rate
required isn't high - 56Kbps should be sufficient.

Thanks for any tips!
Jesse

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2002\05\13@093904 by Micro Eng

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If I recall....a vendor told me the other day, 350mA is what you can push
thru a CAT5 cable pair.  Never did verify it tho...


{Quote hidden}

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'[EE] PCB Trace widths for Power & GND'
2003\01\13@134848 by Larry Bradley
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I'm laying out a PCB for a PIC 16F877 project, and I'm wondering about the
minimum trace widths to use for the power and ground traces. The standard
width used for all the traces (so far) is 10 mils. And life is easier,
layoutwise, if I can use 10 mil for the power and ground traces as well.
The current consumption as around 35 mA, and the board is 5" by 2.5 ",
double sided. I'm using some analog circuitry, but it has it's own ground
which is tied to the power ground at one point close to the regulator. The
analog 5V is decoupled from the digital 5V.

I'm new to this layout stuff. Can any of you experts out there tell me if I
can use a 10 mil trace, or should I use something larger?

Thanks

Larry Bradley
Orleans (Ottawa), Ontario, CANADA

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2003\01\13@151504 by M. Adam Davis

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I'm no PCB expert, but I can give you a few reasons why one might
consider larger traces than the current capacity calls for.

1) Traces are antennas
2) Traces are inductors
3) Traces are capacitors
4) Traces are resistors

The smaller a trace is, the less able it can handle surge current
demands.  Electricity, despite our digital desires, is not infinite in
speed, and a current demand at one end of a long wire does not
instantaneously mean a current demand at the other end of the wire.

Depending on the application, a thin power trace might be just fine.
Remember, however, that on power up a thin trace may take a longer
amount of time to energize capacitors you'd have to place around the
board to make up for the current limits of the trace, and your processor
might not be correctly reset.

As a general rule, oversizing your power and ground traces will limit
the problems, lower the noise floor, etc.  Specifically, however, only
you can tell whether it's enough.

-Adam

Larry Bradley wrote:

{Quote hidden}

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2003\01\13@161629 by bobblick

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> I'm new to this layout stuff. Can any of you experts out there tell me if I
> can use a 10 mil trace, or should I use something larger?

If you have a perfect layout, usually. But thicker traces let you "get away"
with less-than-perfect layout.

10 mil ground traces are "uncommon" :)

Cheers,

Bob

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2003\01\13@162741 by Rick C.

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ALWAYS use the largest trace width possible for power and ground! As a bonus,
if you make your own boards, that is all the less copper you have to etch away.
Same goes for all the other traces. For thru hole boards, 30 mils is the
minimum. Especially if you have any rework, you have something to solder to
that won't float away.
Rick

http://www.pic101.com/pcb_checklist.htm



Larry Bradley wrote:

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2003\01\13@170047 by lexandre_Guimar=E3es?=

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Hi,

> I'm new to this layout stuff. Can any of you experts out there tell me if
I
> can use a 10 mil trace, or should I use something larger?


   I do not consider myself an expert but I have done quite a few products
that are on the market and they usually work well :-)

   I would use a much larger power trace.. Remember that even if your
average power consuptiom is 35ma Cmos switches very fast and can "eat" more
than 1 amp when switching. The decoupling capacitors are your main defense
there but "beafier" traces also help a lot, specially ground.

   As a rule of thumb I never use less than 40 mils for vcc and 50 for
ground return. Whenever I have more than a few hundred miliamps I try to
route power directly from the regulator. If I cannot do that I try to
calculate the worst case conditions and use heavier decoupling. That also
helps a lot in emissions control.

   When I have to get the board inside a box that is oversized and has
mouting holes that I have to follow I use much heavier power traces, as
heavy as possible...

   Another layout trick that I find very nice for power traces and really
gives measurable improvement in decoupling is to put the capacitor as close
to the IC ground pin as possible, route vcc to the capacitor with as wide a
trace as possible and than go with a 20 mils trace to the vcc pin. I saw
that in a tip from David Vanhorn, that should still be part of this list and
you can see how better the results are with a good scope. He has a website
that explains it in more details but I do not have the address handy. Nice
tip indeed.

Best regards,
Alexandre Guimaraes

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2003\01\13@170704 by Larry Bradley

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I'm going to have the board done at Olimex - it's fairly dense (7 IC's,
including a PIC 16F877, a couple of TO220 transistors, 4 TO92 transistors,
several headers for off-board connections, resistors, capacitors - on a 5"
x 2.5" board. All components are through-hole, not SMD.

I'm using UltiBoard, and it's auto router does a fantastic job - but you
need 10 mil traces to be able to go between pins on ICs. On one layout, I
manually increased the size of some of the traces to 20 mils, but it was on
a 4" by 4" board. I had to change the size to be able to fit the enclosure
I was able to get.

I'll play around with increasing selected traces.

Thanks

Larry

At 04:27 PM 1/13/2003 -0500, you wrote:
>ALWAYS use the largest trace width possible for power and ground! As a bonus,
>if you make your own boards, that is all the less copper you have to etch
>away.
>Same goes for all the other traces. For thru hole boards, 30 mils is the
>minimum. Especially if you have any rework, you have something to solder to
>that won't float away.
>Rick
>

Larry Bradley
Orleans (Ottawa), Ontario, CANADA

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2003\01\13@172541 by Olin Lathrop

face picon face
> > I'm new to this layout stuff. Can any of you experts out there tell me
if I
> > can use a 10 mil trace, or should I use something larger?
>
> If you have a perfect layout, usually. But thicker traces let you "get
away"
> with less-than-perfect layout.
>
> 10 mil ground traces are "uncommon" :)

Most board houses guarantee at least 8mil track and 8mil space, so you
should be OK with 10mil.  Except for exceptions <g>, I use 15mil tracks
and 12mil space minimum for prototyping.  One track then requires 12 + 15
+ 12 = 39mil total clearance.  I make the .1 inch DIP pads 60mil in
diameter, leaving 40mil between them.  This scheme therefore allows one
track between DIP pads, with an extra mil to spare for roundoff error or
whatever other slop might happen inside the CAD program.

Note that this is quite conservative, and you can definitely do better
with extra care if small size really matters.


*****************************************************************
Embed Inc, embedded system specialists in Littleton Massachusetts
(978) 742-9014, http://www.embedinc.com

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2003\01\13@174234 by William Chops Westfield

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   I'm using UltiBoard, and it's auto router does a fantastic job - but you
   need 10 mil traces to be able to go between pins on ICs.

Really?  I was dissappointed when Eagle made me go down to 16 mil traces to
get between pads without violating the normal design rules (I like to use
24mil minimum trace width, and somewhat larger-than-normal pads.)  By the
time you get down to 10mil, I would think you should be able to do 2 traces
between pads!  (Of course, autorouters might be more conservative.  I've
wanted to experiment with an Eagle ULP that would start with a large track
width and decrease until autoroutes complete (or the other way around...)  I
want all my traces to be as wide as possible, for "hobbyist fabrication." )

BillW

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2003\01\13@175110 by Spehro Pefhany

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At 05:06 PM 1/13/03 -0500, you wrote:

>I'm using UltiBoard, and it's auto router does a fantastic job - but you
>need 10 mil traces to be able to go between pins on ICs.

Hunh? If you use 55 mil pads with 31 mil holes (12 mil annular ring), you
can use 15 mil = (100 - 55)/3 traces and spaces (just an example).

>  On one layout, I
>manually increased the size of some of the traces to 20 mils, but it was on
>a 4" by 4" board. I had to change the size to be able to fit the enclosure
>I was able to get.
>
>I'll play around with increasing selected traces.

You should manually route the power traces first on a two or fewer layer
board. Maximize the width and minimize the enclosed area (put them on
overtop of each other on opposite sides if possible). Place bypass caps
close to the microcontroller and other chips that require it. Copper pour
on the power connections if your package supports it, but make sure the
layout is good first. Make sure that any high current stuff has its own
path back. Avoid having digital supply current and signals flowing
through analog circuitry.

Best regards,

Spehro Pefhany --"it's the network..."            "The Journey is the reward"
RemoveMEspeffspamTakeThisOuTinterlog.com             Info for manufacturers: http://www.trexon.com
Embedded software/hardware/analog  Info for designers:  http://www.speff.com

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2003\01\14@184331 by Larry Bradley

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>Well, thanks to all for the suggestions.


I've laid out a board using 15 mil traces with 12 mil spacing, and using 20
mil traces for power and ground. Looks good.



Larry Bradley
Orleans (Ottawa), Ontario, CANADA

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'[EE:] Home Brew Hydro Power & other self sufficien'
2004\07\13@062826 by Alan B. Pearce
face picon face
Interesting looking link. Haven't actually gone digging down the other
links, but they look potentially (pun intended) interesting as well.

http://www.otherpower.com/scotthydro1.html

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