Post by thread:[PIC]: HVP programming of the 16F628

I am trying to adapt my WISP programmer to program the 16F628, but so far no luck. Or rather: half luck, which is worse. It sometimes works, sometimes fails, sometimes works half. WISP was orginally designed for the 16x84's, and works OK for 16F877 (which shares more or less the same programming specs). I noticed that Vpp for the 16F628 is 13.5 V max versus 14 V for the 16x84 and F877, so I limited this with a zener. Am I overlooking something? In the 16F628 programming specs I found a parameter, Tppdp (p12), which (on the timing diagrams on p13) seems to indicate that power must be applied after Vpp has been applied. Is this a correct interpretation? The text on p3 does not mention this (or at least I don't read it there). And the 16F628 programming specs do not specify how much current MCLR can draw (16x84 specs state 200 uA max). Any idea's what I am doing wrong? Wouter -- http://www.piclist.com#nomail Going offline? Don't AutoReply us! email spam_OUTlistservTakeThisOuTmitvma.mit.edu with SET PICList DIGEST in the body

I have not looked at the prog spec of 16f62x but generally its important to let Vpp rise from zero to Vpp under less than 8us. Thats for ICSP anyway. Just a guess. Niklas Wennerstrand -----Ursprungligt meddelande----- Från: pic microcontroller discussion list [.....PICLISTKILLspam@spam@MITVMA.MIT.EDU] För wouter van ooijen & floortje hanneman Skickat: den 14 juni 2001 22:57 Till: PICLISTKILLspamMITVMA.MIT.EDU Ämne: [PIC]: HVP programming of the 16F628 I am trying to adapt my WISP programmer to program the 16F628, but so far no luck. Or rather: half luck, which is worse. It sometimes works, sometimes fails, sometimes works half. WISP was orginally designed for the 16x84's, and works OK for 16F877 (which shares more or less the same programming specs). I noticed that Vpp for the 16F628 is 13.5 V max versus 14 V for the 16x84 and F877, so I limited this with a zener. Am I overlooking something? In the 16F628 programming specs I found a parameter, Tppdp (p12), which (on the timing diagrams on p13) seems to indicate that power must be applied after Vpp has been applied. Is this a correct interpretation? The text on p3 does not mention this (or at least I don't read it there). And the 16F628 programming specs do not specify how much current MCLR can draw (16x84 specs state 200 uA max). Any idea's what I am doing wrong? Wouter -- http://www.piclist.com#nomail Going offline? Don't AutoReply us! email .....listservKILLspam.....mitvma.mit.edu with SET PICList DIGEST in the body -- http://www.piclist.com#nomail Going offline? Don't AutoReply us! email EraseMElistservspam_OUTTakeThisOuTmitvma.mit.edu with SET PICList DIGEST in the body

Hi- We had some troubles with programming 628s too - I think it came down to the sequence with which the power was applied. David wouter van ooijen & floortje hanneman wrote: {Quote hidden}> I am trying to adapt my WISP programmer to program the 16F628, but so far no > luck. Or rather: half luck, which is worse. It sometimes works, sometimes > fails, sometimes works half. WISP was orginally designed for the 16x84's, > and works OK for 16F877 (which shares more or less the same programming > specs). I noticed that Vpp for the 16F628 is 13.5 V max versus 14 V for the > 16x84 and F877, so I limited this with a zener. Am I overlooking something? > In the 16F628 programming specs I found a parameter, Tppdp (p12), which (on > the timing diagrams on p13) seems to indicate that power must be applied > after Vpp has been applied. Is this a correct interpretation? The text on p3 > does not mention this (or at least I don't read it there). And the 16F628 > programming specs do not specify how much current MCLR can draw (16x84 specs > state 200 uA max). Any idea's what I am doing wrong? > > Wouter > > -- > http://www.piclist.com#nomail Going offline? Don't AutoReply us! > email listservspam_OUTmitvma.mit.edu with SET PICList DIGEST in the body -- http://www.piclist.com#nomail Going offline? Don't AutoReply us! email @spam@listservKILLspammitvma.mit.edu with SET PICList DIGEST in the body

> I have not looked at the prog spec of 16f62x but generally its important to > let Vpp rise from zero to Vpp under less than 8us. Thats for ICSP anyway. That is for 16x84/f87x. 16F628 specifies 1 us, but I don't think that's the problem. I have no cap on MCLR, so I think the rise is pretty fast. Wouter -- http://www.piclist.com hint: To leave the PICList RemoveMEpiclist-unsubscribe-requestTakeThisOuTmitvma.mit.edu

In message <00a301c0f514$a0668c00$0500a8c0@dell>, wouter van ooijen & floortje hanneman <spamBeGonewfspamBeGoneXS4ALL.NL> writes >I am trying to adapt my WISP programmer to program the 16F628, but so far no >luck. Or rather: half luck, which is worse. It sometimes works, sometimes >fails, sometimes works half. WISP was orginally designed for the 16x84's, >and works OK for 16F877 (which shares more or less the same programming >specs). I noticed that Vpp for the 16F628 is 13.5 V max versus 14 V for the >16x84 and F877, so I limited this with a zener. Am I overlooking something? >In the 16F628 programming specs I found a parameter, Tppdp (p12), which (on >the timing diagrams on p13) seems to indicate that power must be applied >after Vpp has been applied. Is this a correct interpretation? The text on p3 >does not mention this (or at least I don't read it there). And the 16F628 >programming specs do not specify how much current MCLR can draw (16x84 specs >state 200 uA max). Any idea's what I am doing wrong? I have no problems using the P16PRO40 hardware with no modifications, I basically use the same system as the 16F877, I still apply Vdd first, then delay for a few milliseconds, then apply Vpp. -- Nigel. /--------------------------------------------------------------\ | Nigel Goodwin | Internet : TakeThisOuTnigelgEraseMEspam_OUTlpilsley.co.uk | | Lower Pilsley | Web Page : http://www.lpilsley.co.uk | | Chesterfield | Official site for Shin Ki and New Spirit | | England | Ju Jitsu | \--------------------------------------------------------------/ -- http://www.piclist.com hint: To leave the PICList RemoveMEpiclist-unsubscribe-requestTakeThisOuTmitvma.mit.edu

On Fri, 15 Jun 2001, wouter van ooijen & floortje hanneman wrote: > > I have not looked at the prog spec of 16f62x but generally its important > to > > let Vpp rise from zero to Vpp under less than 8us. Thats for ICSP anyway. > > That is for 16x84/f87x. 16F628 specifies 1 us, but I don't think that's the > problem. I have no cap on MCLR, so I think the rise is pretty fast. > Wouter > How does it looks signals on serial clk and data ? Do you have used ICSP ? If yes, some anoying problems can be avoided if you have a pullup resistor near the chip on both clk and data lines and a small capacitor ( 10...100pF ) on data line. I've made three or four parallel programmers and some of those, doesn't work without this trick. Some friends reports that 13.5V is not enough for some chips in new pic series. regards, Vasile -- http://www.piclist.com hint: To leave the PICList piclist-unsubscribe-requestEraseME.....mitvma.mit.edu

> How does it looks signals on serial clk and data ? Still no scope, so I cannot take a look.... > Do you have used ICSP Yes, and now that you ask: when I put just the chip in the testclip I have (almost) no problems. > ? If yes, some anoying problems can be avoided if you have a pullup > resistor near the chip on both clk and data lines and a small > capacitor ( 10...100pF ) on data line. I've made three or four parallel > programmers and some of those, doesn't work without this trick. I'll give that a try. > Some friends reports that 13.5V is not enough for some chips in new pic > series. According to the 16F628 spec it is the absolute maximum.... Wouter -- http://www.piclist.com hint: To leave the PICList EraseMEpiclist-unsubscribe-requestmitvma.mit.edu