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'[PIC]: 16F877 - Why two sets of power pins?'
2001\10\23@032511 by Bala Chandar

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While using the 16F877, I have been connecting only one set of power supply
pins (+5V and Gnd to pins 32 & 31) and haven't faced any problems so far.

Sometime back, someone in this list had asked why there are two Vdd and two
ground pins in 16F877. I was under the impression that it is there merely to
ensure pinout compatibility with 28 pin devices, so that the socket in the
programmer is suitable for both.

But when I checked with the multimeter, I was surprised to find a resistance
of around 2.5 ohms between the two Vdd pins (11 & 32) and the two ground
pins (12 & 31). If the two pins are internally connected, should not the
resistance be zero ohm? Or is it necessary to tie both the pins together for
some reason?

Any comments?

Regards,
Bala

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2001\10\23@045551 by Vasile Surducan

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analogic and digital section.
Vasile

On Tue, 23 Oct 2001, Bala Chandar wrote:

{Quote hidden}

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2001\10\23@050729 by Kevin Blain

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which is which?

-----Original Message-----
From: pic microcontroller discussion list
[.....PICLISTKILLspamspam.....MITVMA.MIT.EDU]On Behalf Of Vasile Surducan
Sent: 23 October 2001 07:31
To: EraseMEPICLISTspam_OUTspamTakeThisOuTMITVMA.MIT.EDU
Subject: Re: [PIC]: 16F877 - Why two sets of power pins?


analogic and digital section.
Vasile

On Tue, 23 Oct 2001, Bala Chandar wrote:

> While using the 16F877, I have been connecting only one set of power
supply
> pins (+5V and Gnd to pins 32 & 31) and haven't faced any problems so far.
>
> Sometime back, someone in this list had asked why there are two Vdd and
two
> ground pins in 16F877. I was under the impression that it is there merely
to
> ensure pinout compatibility with 28 pin devices, so that the socket in the
> programmer is suitable for both.
>
> But when I checked with the multimeter, I was surprised to find a
resistance
> of around 2.5 ohms between the two Vdd pins (11 & 32) and the two ground
> pins (12 & 31). If the two pins are internally connected, should not the
> resistance be zero ohm? Or is it necessary to tie both the pins together
for
{Quote hidden}

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2001\10\23@073054 by Byron A Jeff

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On Tue, Oct 23, 2001 at 10:00:37AM +0100, Kevin Blain wrote:
> which is which?

It's not as cut and dried as analog/digital. The bottom line is that a chip
is laid out in 3 dimensional space. As real estate fills up it becomes more
difficult to route power and ground to some areas of the chip. Hence the
multiple power pins.

This is a non-problem that one should not overthink. Always connect all power
pins unless the data sheet gives specific guidelines as to why all power pins
should not be connected.

BAJ
>
> {Original Message removed}

2001\10\23@075006 by Kevin Blain

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Which would explain why microchip don't specify which is which.

It strikes me anyway that on the devices with more pins (40) that extra
power and ground are a good idea anyway, as there would be a greater
requirement for current to drive the I/O pins.

The datasheet (18cxx2 for example) says

"Maximum current into VDD pin : 250mA"

Do you think that having two pins means you can shift 500mA on that device,
within the constraints of the specified 1.0 Watt power dissipation???

{Original Message removed}

2001\10\23@080311 by Vasile Surducan

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On the first release (a and b) datasheet, Microchip don't specific either
the voltage range accepted for vref.
I think I have right. I haven't time to test right now, but the answer
came by measuring the current flow on both pairs with and without the AD
switched on.
I don't recommend to supply the chip until it sink 250mA or 500mA !
( nor to load the io pins at vcc=5V to get Isupply = 250mA )

Vasile

On Tue, 23 Oct 2001, Kevin Blain wrote:

{Quote hidden}

> {Original Message removed}

2001\10\23@082330 by John Walshe

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> It's not as cut and dried as analog/digital. The bottom line is that a
chip
> is laid out in 3 dimensional space. As real estate fills up it becomes
more
> difficult to route power and ground to some areas of the chip. Hence the
> multiple power pins.

Agreed, working with this device at a die level you will see that from each
power and ground pin there are several wirebonds to the die. This is because
different logic blocks are supplied separately. In fact it is possible to
separate Avdd from VDD at the die level by bonding out to separate supply
lines.
The bondout of the power pins of the 876 are slightly different to the 877,
thus shutting down the blocks not available in the 876 - the die is the
same!

>
> This is a non-problem that one should not overthink. Always connect all
> power
> pins unless the data sheet gives specific guidelines as to why all power
> pins
> should not be connected.

Definitely so if you want ALL logic/peripherals to be available for use.

> > > While using the 16F877, I have been connecting only one set of power
> > supply
> > > pins (+5V and Gnd to pins 32 & 31) and haven't faced any problems so
> far.

You mustn't be using all the peripherals fully then.



John

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2001\10\23@093346 by Olin Lathrop

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> While using the 16F877, I have been connecting only one set of power
supply
> pins (+5V and Gnd to pins 32 & 31) and haven't faced any problems so far.

Bad idea.  You should hook them all up and make sure the redundant pins are
connected to each other externally via a low impedence path.  This is
usually done with a PC trace right under the chip.  They are internally
connected but the bond wires, connections to the substrate, etc, all have
some resistance.  Not connecting the multiple pins may cause voltages to be
out of spec in parts of the chip, especially when there is a lot of ground
or power current.


********************************************************************
Olin Lathrop, embedded systems consultant in Littleton Massachusetts
(978) 742-9014, spamBeGoneolinspamBeGonespamembedinc.com, http://www.embedinc.com

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2001\10\24@030815 by Bala Chandar

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John Walshe wrote:
> > While using the 16F877, I have been connecting only one set of power
> > supply pins (+5V and Gnd to pins 32 & 31) and haven't faced
> > any problems so far.

> You mustn't be using all the peripherals fully then.

You are right, John. I have only used some digital I/O pins, the A to D
converter & PWM. I have not tried the other features like USART and PSP.


Olin Lathrop wrote:
> > While using the 16F877, I have been connecting only one set of power
supply
> > pins (+5V and Gnd to pins 32 & 31) and haven't faced any problems so
far.

> Bad idea.  You should hook them all up and make sure the redundant pins
are
> connected to each other externally via a low impedence path.  This is
> usually done with a PC trace right under the chip.  They are internally
> connected but the bond wires, connections to the substrate, etc, all have
> some resistance.  Not connecting the multiple pins may cause voltages to
be
> out of spec in parts of the chip, especially when there is a lot of ground
> or power current.

Thanks a lot Olin, for the guidance and explanation.

When it is quite important to tie the two Vdd and Vss pins together for
proper operation, it is odd that the data sheet for 16F877 does not
specifically say so. I could only locate the following on page 11 of the pdf
file (30292c.pdf):

  VSS Pins 12,31  - Ground reference for logic and I/O pins.
  VDD Pins 11,32  - Positive supply for logic and I/O pins.

Regards,
Bala

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2001\10\24@054026 by Gerhard Fiedler

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At 00:38 10/24/2001 -0500, Bala Chandar wrote:
>it is odd that the data sheet for 16F877 does not
>specifically say so. I could only locate the following on page 11 of the pdf
>file (30292c.pdf):
>
>    VSS Pins 12,31  - Ground reference for logic and I/O pins.
>    VDD Pins 11,32  - Positive supply for logic and I/O pins.

I'd say if a data sheet says _this_, it says as much as that you have to
connect all four pins for proper operation as specified. It doesn't have to
say so explicitly, it is kind of implicitly said. Of course it may be that
it works with only one pair connected, but you can't claim anything if it
doesn't.

ge

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2001\10\24@063551 by Bala Chandar

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Gerhard Fiedler wrote:

> At 00:38 10/24/2001 -0500, Bala Chandar wrote:
> >it is odd that the data sheet for 16F877 does not
> >specifically say so. I could only locate the following on
> page 11 of the pdf
> >file (30292c.pdf):
> >
> >    VSS Pins 12,31  - Ground reference for logic and I/O pins.
> >    VDD Pins 11,32  - Positive supply for logic and I/O pins.
>
> I'd say if a data sheet says _this_, it says as much as that
> you have to connect all four pins for proper operation as specified. It
> doesn't have to say so explicitly, it is kind of implicitly said. Of
course
> it may be that it works with only one pair connected, but you can't claim
> anything if it doesn't.

Hi Gerhard,

Agreed. It is implicitly said.

The point I am trying to make is that, to start with, all the knowledge we
have of a particular chip is based on what we find in its data sheet.
Depending on your experience with the chip, you may come to know more of its
peculiarities or idiosyncrasies that are not listed in the data sheet.

Not all PICs have multiple power supply pins. If I connect only one pair of
power supply pins and find that there is no problem, I will have no clue if
and when the chip starts misbehaving because the other pair is not
connected. It is in this context that I felt, Microchip must have
specifically said that in order to ensure reliable operation, both the Vdd
pins and Vss pins must be connected together. Leaving it to the reader's
interpretation is not the best of ensuring that certain basic rules are
followed for trouble free operation.

One of these days, I will send the suggestion to Microchip :-)

Regards,
Bala

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2001\10\24@071649 by Vasile Surducan

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On Wed, 24 Oct 2001, Bala Chandar wrote:

> The point I am trying to make is that, to start with, all the knowledge we
> have of a particular chip is based on what we find in its data sheet.

Agree either Bala,
This concept is almost true for any digital design, but it could have
improvements for analogical design. Sometime is not enough to design an
amplifier stage knowing only what it written in operational amplifier data
sheet. Fortunately some PICs have either analogic and digital sections
inside. I have really doubts why the Microchip don't saved those two
redundant pins for other extra IO pins, I'm sure the chip masks accept
some minor modifications. I'll check that in the near future.
Regards,
Vasile

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2001\10\24@111905 by Jeff DeMaagd

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----- Original Message -----
From: Bala Chandar <RemoveMEBala.ChandarspamTakeThisOuTAVENTIS.COM>

> Not all PICs have multiple power supply pins. If I connect only one pair
of
> power supply pins and find that there is no problem, I will have no clue
if
> and when the chip starts misbehaving because the other pair is not
> connected. It is in this context that I felt, Microchip must have
> specifically said that in order to ensure reliable operation, both the Vdd
> pins and Vss pins must be connected together. Leaving it to the reader's
> interpretation is not the best of ensuring that certain basic rules are
> followed for trouble free operation.
>
> One of these days, I will send the suggestion to Microchip :-)

Maybe it was already stated in this thread, if so, I apologize for the
redundancy.

Data sheets are written from a technical frame of mind, mostly to engineers
and those that do similar work.  I don't believe that it is left to
interpretation.  In short did the data sheet say N/C (no connection) for
those pins?  If not, connect them as specified on the pinout diagram.  The
general rule for ICs is that all pins must be connected to _something_
unless otherwise specified, and IMO, the data sheet therefore specifies that
power be applied to all the applicable pins.  It takes very little extra
work and might actually save you a lot of trouble down the road.

Jeff

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