Post by thread:[PIC]: Bank Bits

JungWhan wrote: > > Could anyone briefly describe me about the bank bits (page) in status > please? > > Thank you I tried to be brief, but I think I failed :-) In the 14 bit PICs, the code words are 14 bits wide. The instructions that read or write to RAM memory take up 6 of these bits and there is also a destination bit. Example Temp equ 0x20 ; define temp = RAM address 20h movf Temp,W The binary representation of this instruction is... 001000 0 0100000 The first 6 bits are the MOVF instruction - 001000 Bit 7 = destination, 0 = W That leaves 7 bits available for a RAM address. Temp = address 0x20 = 0100000 Therefore, file register instructions by themselves can only access RAM addresses in the range 0 - 127 (0000000 - 1111111) This is called a RAM page or Bank. The PICs have more than 1 RAM page so there must be a mechanism available for us to be able to access them. This is the function of the RAM page select bits in the STATUS register. STATUS,RP0 STATUS,RP1 "Every" time a file register instruction is used these two bits become the two higher order bits of the RAM address. Some of these instructions are ADDWF ANDWF XORWF etc This effectively give us a 9 bit RAM address range RP1 RP0 B6 B5 B4 B3 B2 B1 B0 This allows us to access RAM in the range 0 - 511 (00 0000000 - 11 1111111) We want to read from RAM address 0x20 in the example above, so RP0 and RP1 must be both 0. 00 0100000 To read the TRISA register at address 0x85, we must set the RP0 bit = 1 bsf STATUS,RP0 movf TRISA,W The binary representation of this instruction is... 001000 0 0000101 The actual RAM address becomes 01 0000101 = 85h = TRISA Sometimes people forget to set the RP0 bit to read/write the TRIS registers and they actually read/write the PORT registers instead. bcf STATUS,RP0 movf TRISA,W 00 0000101 = 05h = PORTA You must pay attention to the RP0 and RP1 bits whenever you access the RAM. You do not have to worry about the RP1 bit if the PIC you are using only has two RAM banks, as in the 16F84. There is a maximum RAM address space of 256 bytes in this chip, so the RP1 bit is ignored by the hardware. You do need to pay attention to both the RP0 and RP1 bits in chips like the 16F876 which has all 4 RAM banks available for use. In the example above, try to work out the RAM address if RP0 = 1 instead of 0. Do you read from RAM address 0x20 ?? Example bsf STATUS,RP0 movf Temp,W -- Best regards Tony mICro's http://www.picnpoke.com spam_OUTsalesTakeThisOuTpicnpoke.com -- http://www.piclist.com hint: The PICList is archived three different ways. See http://www.piclist.com/#archives for details.

Rough description (based on low end PICs, don't take as gospel for all). Chunks of RAM in (early) PICs are addressed with just 7 bits which limits the size of each chunk to 128 locations (0x80). 2 bits in the status register are used to point to which chunk is currently in use - RB1 RB0 bank 0 0 = 0 0 1 = 1 1 0 = 2 1 1 = 3 This gives easy access to 4 x 128 = 512 possible RAM locations. A couple of other things - the registers, PC, portA, Status, Option, etc, are all just RAM locations (special ones, but just RAM). Some are double mapped into more than one bank while others are only found in one bank - eg. Option is in bank 1 PortA setup is in bank 1 PortA data contents are in bank 0 Status is in bank 0 & 1 Banks are not always filled, there are often gaps between the end of RAM in one bank and the start of RAM in the next bank - eg. 16C84 has special registers from 0x0 up to 0x0B, then user RAM from 0x0C to 0x24, then a gap up to the start of the next bank at 0x80 Later (and larger) PICs have extra Bank bits to give access to more RAM. bye. > {Original Message removed}