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PICList Thread
'[PIC]: usec delay routine'
2000\09\07@121134 by Sam Linder

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Does anyone have a simple, yet accurate software usec delay routine?
I'm running 4mhz PIC16F877 and want to be able to generate a call to
SoftUsecDelay(NumberOfMicrosecondsToDelay).

I've looked at some delay routines (such as PICLOOPS) but they aren't
accurate down to the usec level and don't seem to allow for a call
containing the desired number of microseconds.

Any suggestions out there?

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2000\09\07@131750 by jamesnewton

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www.piclist.com/../microchip/delays
aka
http://www.piclist.com/techref/default.asp?url=microchip/delays

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{Original Message removed}

2000\09\07@171309 by w. v. ooijen / f. hanneman

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look in the firmware for my wisp programmer (same libraries are in the
wloader firmware). Macros for delays in cycles or (when the clock frequency
is specified) in microseconds and milliseconds.
http://www.xs4all.nl/~wf/souter/pic/wisp or pic/wloader
Wouter

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2000\09\07@172344 by Scott Dattalo

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On Thu, 7 Sep 2000, James Newton wrote:

> http://www.piclist.com/../microchip/delays
> aka
> http://www.piclist.com/techref/default.asp?url=microchip/delays

You may wish to add this to your web page:

http://www.skyinet.net/~ecb/#delay1

Scott

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2000\09\07@180646 by Olin Lathrop

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> Does anyone have a simple, yet accurate software usec delay routine?
> I'm running 4mhz PIC16F877 and want to be able to generate a call to
> SoftUsecDelay(NumberOfMicrosecondsToDelay).

For short delays you can just jump into a list of NOP instructions.  If you
wanted to make a fancy routine, it would first subtract off all its own
overhead, then use a loop for multiples of the loop time, then jump into a
list of NOPs for the exact remainder.  Of course interrupts would need to be
off for any of this to be valid.

What time ranges do you want to delay for?


*****************************************************************
Olin Lathrop, embedded systems consultant in Devens Massachusetts
(978) 772-3129, KILLspamolinKILLspamspamcognivis.com, http://www.cognivis.com

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2000\09\07@235705 by Emil Hristov

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--- Sam Linder <spamBeGoneSamLspamBeGonespamIN-INC.COM> wrote:
> Does anyone have a simple, yet accurate software
> usec delay routine?
> I'm running 4mhz PIC16F877 and want to be able to
> generate a call to
> SoftUsecDelay(NumberOfMicrosecondsToDelay).
>
> I've looked at some delay routines (such as
> PICLOOPS) but they aren't
> accurate down to the usec level and don't seem to
> allow for a call
> containing the desired number of microseconds.
>
> Any suggestions out there?
>
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Try this:

 movlw   HiDlay        ;  Load the Delay Values
 movwf   HiCount
 movlw   ( LoDlay ^ 0x0FF ) + 1
Dlay:
 addlw   1             ;  Increment the Counter by 1
 btfsc   STATUS,Z
  decfsz HiCount,f     ;  Decrement the High Counter
   goto  Dlay

This loop takes five cycles to execute, regardless of
whether or not "HiCount" is to be decremented (and
uses one less File Register than the method above).
The actual time delay is calculated using the sixteen
bit number from:

Time Dlay = 16BitDlay * 5 ins/loop * 4 clocks/ins /
clock frequency


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2000\09\08@144624 by Sam Linder

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Thanks to all who replied - however, none of the routines mentioned do what
I'm looking for. Olin seems to have the clearest picture of what I want. The
software usec delay routine should handle a call from somewhere else in the
program, loop as necessary then return. The time consumed should account for
the call, the overhead, the looping, and the return. Thus, it should look
like this:
       SoftUsecDelay(57);      // C code call

#asm
_SoftUsecDelay:
       overhead
       loop
       return
#endasm

I want to be able to request delays anywhere from 14 to 250 usec and have
the subroutine handle it automatically. Smaller delays can be handled
easily.

I've been going around and around with different ideas for the past few
days, but it seems like I can never be accurate across the scale. I was
hoping that someone had already run in to this before and had come up with a
solution. With all the talent out there, I'm sure someone has and I look
forward to hearing from them. Again, thanks to all who have responded so
far.



{Original Message removed}

2000\09\08@163051 by w. v. ooijen / f. hanneman

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> Thanks to all who replied - however, none of the routines mentioned do
what
> I'm looking for. Olin seems to have the clearest picture of what I want.
The
> software usec delay routine should handle a call from somewhere else in
the
> program, loop as necessary then return. The time consumed should account
for
> the call, the overhead, the looping, and the return. Thus, it should look
> like this:
>         SoftUsecDelay(57);      // C code call

Like

;
; SUMMARY:
;       macro for a delay of n microseconds
;
; DESCRIPTION:
;       This macro provides a delay of exactly n microseconds. It is a
;       simple front-end to delay_cycles.
;
; RESOURCES (each use):
;       code            depends on n and xtal (see delay_cycles)
;       cycles          n * (x
;       stack           0 or 1
; RESOURCES (once):
;       code            8 (for delay_5_#(n)w_c)
;       file            0
;
delay_microseconds macro n
local cycles = (D'1000000' * n) / (xtal / 4)
delay_cycles cycles
endm

? (snip from delay.inc from the wloader firmware)

Wouter

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2000\09\08@184057 by Andrew Warren

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Sam Linder <EraseMEPICLISTspamMITVMA.MIT.EDU> wrote:

> Thanks to all who replied - however, none of the routines
> mentioned do what I'm looking for.  .... The software usec delay
> routine should handle a call from somewhere else in the program,
> loop as necessary then return.
> ....
> I want to be able to request delays anywhere from 14 to 250 usec and
> have the subroutine handle it automatically.

Sam:

From a message I posted two years ago (and which I just found, in
about 5 seconds, searching the PICLIST archive at http://www.piclist.com for
the word "delay"):

   Try this; it generates delays with a resolution of one cycle,
   although it's limited to the range [20-271].

       MOVLW   X
       CALL    DELAY

       ....

   ; This routine delays X cycles.  Enter with X (in the range
   ; [20-271]) in the W register.
   ;
   ; Note that the delay is inclusive of the "MOVLW X", "CALL
   ; DELAY", and "RETURN" overhead, so a sequence like:
   ;
   ;     MOVLW   100
   ;     CALL    DELAY
   ;     MOVLW   200
   ;     CALL    DELAY
   ;
   ; will delay EXACTLY 300 cycles.

   DELAY:

       MOVWF   COUNTER

       BTFSC   COUNTER, 0
       GOTO    $+1

       BTFSS   COUNTER, 1
       GOTO    SKIP
       NOP
       GOTO    $+1

   SKIP:

       RRF     COUNTER
       RRF     COUNTER

       MOVLW   4
       SUBWF   COUNTER

       BCF     COUNTER,6
       BCF     COUNTER,7

   LOOP:

       NOP
       DECFSZ  COUNTER
       GOTO    LOOP

       RETURN

-Andy


=== Andrew Warren --- RemoveMEaiwEraseMEspamEraseMEcypress.com
=== Cypress Semiconductor Corporation
=== Interface Products Division, S.D.
===
=== The opinions expressed above do
=== not necessarily represent those of
=== Cypress Semiconductor Corporation.

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2000\09\08@191436 by Bob Ammerman

picon face
No, he wants a "C" callable _subroutine_, not a macro.

Bob Ammerman
RAm Systems
(contract development of high performance, high function, low-level
software)

{Original Message removed}

2000\09\08@192518 by Sam Linder

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Andy:
That's it! Dead on, just like you said.
Thank you - and again thanks to all the other PIC LIST members who responded
to my request. Now I can move on to other more pressing problems, whew.....!

(BTW, I had tried searching the pic list based on James Newton's post -
never did find anything I could use.)
       Sam....


{Original Message removed}

2000\09\09@003241 by Scott Dattalo

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On Fri, 8 Sep 2000, Andrew Warren wrote:

{Quote hidden}

Here's one that works similarly:

;**********************************************************************
; Adjustable delay from 11-256 cycles (for 14 bit core)
; W = count, cycle count excludes loading of W
; by Regulus Berdin
delay:
       addlw -(.10+1)  ;2+1 remove 1 count more for carry correction
       addlw -4        ; 1
       skpnc           ; 1/2
        goto $-2       ; 2
       sublw 0xFF      ; 1
       addwf PCL,f     ; 2
delay7  nop             ; delay adjuster
delay6  nop             ;
delay5  nop             ;
delay4  return          ;2

This is the one I posted the URL for yesterday. There's a similar version for
the 12-bit cores too.

http://www.skyinet.net/~ecb/#delay1

Scott

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2000\09\10@005937 by Dwayne Reid

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At 11:37 AM 9/8/00 -0700, Sam Linder wrote:
>Thanks to all who replied - however, none of the routines mentioned do what
>I'm looking for. Olin seems to have the clearest picture of what I want. The
>software usec delay routine should handle a call from somewhere else in the
>program, loop as necessary then return. The time consumed should account for
>the call, the overhead, the looping, and the return. Thus, it should look
>like this:
>         SoftUsecDelay(57);      // C code call

Here is something posted quite some while ago by Mike Harrison - maybe its
close to what you are looking for:

 BBS: MICROCHIP TECHNOLOGY CUSTOMER SUPPORT BB
Date: 05-16-94 (14:52)             Number: 31206
From: MHARRISON                    Refer#: 31202
  To: MHARRISON                     Recvd: NO
Subj: neat little routines           Conf: (5) APPLICN
---------------------------------------------------------------------------
Another handy routine ...
this code generates a delay with a resolution of 1 cycle, which is handy
for tone generation and pwm.  the delay is a constant (determined by the
rest of the code) plus a 10 bit delay value

enter with 8 MS bits of delay in delhi, 2 LS bits of delay XOR 3
in delaylo bit 0,1

loop
 nop
 decfsz delhi
 goto loop ; coarse delay to nearest 4 cycles
 movf dello,w
 addwf pc ; fine delay by skipping 0,1,2 or 3 nops
 nop
 nop
 nop

Here is the version I came up with (based upon the above)

;10 bit delay routine providing 1 cycle resolution.  Works with both 12 &
14 bit core PICs.
;Original idea from Mike Harrison.  This version by Dwayne Reid
;
;enters with upper 8 bits of delay in DELAYU, lower 2 bits in bits 1,0 of
DELAYL
;bits 7..2 in DELAYL can be used as flags for whatever purpose desired.
;returns with W destroyed
Delay10bit      ;delay is 10 bit value + 7 cycles ( + call + return, if any)
    incf        DELAYU,F        ;correct for dec & test instead of test & dec
Dly10bLoop
    comf        DELAYL,W        ;invert LSBs
    decfsz      DELAYU,F
      goto      Dly10bLoop      ;coarse delay to closest 4 cycles
    andlw       b'00000011'
    addwf       PCL,F
    nop
    nop
    nop

I hope one of these is useful.

dwayne



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2000\09\10@043959 by Bane Jakovljevic

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> Does anyone have a simple, yet accurate software usec delay routine?
> I'm running 4mhz PIC16F877 and want to be able to generate a call to
> SoftUsecDelay(NumberOfMicrosecondsToDelay).
>
> I've looked at some delay routines (such as PICLOOPS) but they aren't
> accurate down to the usec level and don't seem to allow for a call
> containing the desired number of microseconds.
>
> Any suggestions out there?



Such a routine will be implemented in the Flash Compiler by Celestial
Horizons and should be released this month. It will even tell you the error
in nanoseconds, which might occur if you are using a non-standard crystal.
The only thing is that this is a basic compiler, not simply an assembly
routine for the PIC.

>
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2000\09\12@051251 by Nikolai Golovchenko

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---- Original Message ----
From: Dwayne Reid <RemoveMEdwaynerKILLspamspamPLANET.EON.NET>
Sent: Sunday, September 10, 2000 7:25:38
 To: PICLISTSTOPspamspamspam_OUTMITVMA.MIT.EDU
Subj: [PIC]: usec delay routine

<snip>
{Quote hidden}

<snip>

Dwayne, this is a nice one!

Let's now extend it to ANY delay :)

;-----------------------------------------------------------
;d0, d1, d2, ...dn      - counters
;d0 = 0..3              - least significant 2 bits
;d1,...dn = 0..255      - more significant 8, 16, 24, ... bits
;
;Total Delay =
;= d0+4*d1+4*256*d2+4*256*256*d3...+4*256^(n-1)*dn + overhead
;
;Overhead depends on a number of counters, see below

;First preincrement all counters except d0
;overhead = n cycles
       incf d1, f
       incf d2, f
       ...
       incf dn, f
;2 bit delay (d0 - 1 cycle resolution)
;overhead += 4 cycles
       comf d0, w
       andlw 0x03
       addwf PCL, f
Delay64Mx
Delay256Kx
       nop
Delay1Kx
       nop
Delay4x
       nop
;8 bit delay (d1 - 4 cycle resolution)
;overhead += 2 cycles
       decfsz d1, f
        goto Delay4x

;8 bit delay (d2 - 1024 cycle resolution)
;overhead += 3 cycles
       decf d1, f
       ;change d1 to 255, so previous loop
       ;(from Delay4x) will take
       ;255*4-1=1019 cycles
       ;we need to add 5 more cycles to get 1024.
       ;4 cycles are in this loop and
       ;another 1 cycle is a nop above

       decfsz d2, f
        goto Delay1Kx

;8 bit delay (d3 - 262144 cycle resolution)
;overhead += 3 cycles
       decf d2, f
       ;previous two loops (from Delay4x) will take
       ;1019+255*1024-1=262138 cycles
       ;we need to add 6 more cycles to get 262144.
       ;4 cycles are in this loop and
       ;another 2 cycles are above - two nops

       decfsz d3, f
        goto Delay256Kx

;8 bit delay (d4 - 262144*256 cycle resolution)
;overhead += 4 cycles
       decf d3, f
       ;previous two loops (from Delay4x) will take
       ;262138+255*262144-1 cycles
       ;we need to add 7 more cycles to get 4*256^3.
       ;5 cycles are in this loop and
       ;another 2 cycles are above - two nops
       nop
       decfsz d4, f
        goto Delay64Mx

;at this point we have a 34 bit one cycle resolution delay!
;Total Delay = overhead + 0..1.7e10 cycles
;overhead = 4+4+2+3+3+4 = 20 cycles
;-----------------------------------------------------------

And the same for a SX chip:

;-----------------------------------------------------------
;d0, d1, d2, ...dn      - counters
;d0 = 0..3              - least significant 2 bits
;d1,...dn = 0..255      - more significant 8, 16, 24, ... bits
;
;Total Delay =
;= d0+4*d1+4*256*d2+4*256*256*d3...+4*256^(n-1)*dn + overhead
;
;Overhead depends on a number of counters, see below

;First preincrement all counters except d0
;overhead = n cycles
       inc d1
       inc d2
       ...
       inc dn
;2 bit delay (d0 - 1 cycle resolution)
;overhead += 5 cycles
       mov w, /d0
       and #$03
       add PC, w
Delay256Kx
       nop
Delay64Mx
       nop
Delay1Kx
       nop
;8 bit delay (d1 - 4 cycle resolution)
;overhead += 2 cycles
Delay4x
       decsz d1
        jmp Delay4x

;8 bit delay (d2 - 1024 cycle resolution)
;overhead += 3 cycles
       dec d1
       ;change d1 to 255, so previous loop
       ;(from Delay4x) will take
       ;255*4-2=1018 cycles
       ;we need to add 6 more cycles to get 1024.
       ;5 cycles are in this loop and
       ;another 1 cycle is a nop above

       decsz d2
        jmp Delay1Kx

;8 bit delay (d3 - 262144 cycle resolution)
;overhead += 3 cycles
       dec d2
       ;previous two loops (from Delay4x) will take
       ;1018+255*1024-2=262136 cycles
       ;we need to add 8 more cycles to get 262144.
       ;5 cycles are in this loop and
       ;another 3 cycles are above - three nops

       decsz d3
        jmp Delay256Kx

;8 bit delay (d4 - 262144*256 cycle resolution)
;overhead += 6 cycles
       dec d3
       ;previous two loops (from Delay4x) will take
       ;262136+255*262144-2 cycles
       ;we need to add 10 more cycles to get 4*256^3.
       ;8 cycles are in this loop and
       ;another 2 cycles are above - two nops

       jmp $+1
       decsz d4
        jmp Delay64Mx

;at this point we have a 34 bit one cycle resolution delay!
;Total Delay = overhead + 0..1.7e10 cycles
;overhead = 4+5+2+3+3+6 = 23 cycles
;-----------------------------------------------------------

This is probably too small for SX :)


Nikolai

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2000\09\13@144823 by Sam Linder

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Dwayne:
I tried implementing your delay routine but ran into addressing problems.
Whenever the code gets to the following line:
            addwf       PCL,F
it vectors to the wrong address.

When I step through the code, I notice that PCLATH is usually set to 0x07 or
0x0F (depending upon where the routine is linked in by my compiler), yet my
code's PC is an address like 0x3A4 (for example). When I add the contents of
the w register (for example 0x03) to PCL, my code vectors to 0xFA8 instead
of 0x3A8. I know it's because PCLATH is set to 0x0F right before I execute
the addwf  PCL,F instruction.

I've read through MicroChips APP Notes (e.g. AN556) and the PIC16F87x manual
so I understand the problem. I just don't understand why it isn't a problem
when you implement the same code. How did you get around the problem?

(By the way, this shouldn't make any difference, but the delay code is
implemented inside of the #asm / #endasm construct as most of my code is
written in C using the Hi-Tech C compiler).




{Original Message removed}

2000\09\15@120523 by Sam Linder

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I've just been notified that my response to Alan P. did not have the correct
subject header for the list - sorry. Here it is again.


{Original Message removed}

2000\09\15@150225 by Sam Linder

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Dwayne:
I'm about to take off for the day but wanted to generate this quick reply.
I'll study how to implement your boundary check when I return to work on
Monday. Thanks for the reply.

<snip>
How are you calling or instantiating the routine?  Is it inline assembly or
is it a subroutine?  What will the compiler do when you change PCLATH?
<snip>

My program is primarily written in C. I'm using Hi-Tech Compiler -
PIC16F877. The call is done via the following method:

#asm
   // request 100usec delay
   movlw   0x19
   movwf   _delayU
   clrf    _delayL
   call    Delay10bit
#endasm
Using MPLAB's Stop Watch, I calculate 123usec's on a call requesting
100usec.

I implemented your code as follows (just dropped it into my module outside
of any subroutines):

unsigned char delayU, delayL;   // C code
#asm
Delay10bit              // delay is 10 bit value + 7 cycles ( + call +
return, if any)
   incf    _delayU,f   // correct for dec & test instead of test & dec
Dly10bLoop:
   comf    _delayL,w   // invert LSBs
   decfsz  _delayU,f
   goto    Dly10bLoop  // coarse delay to closest 4 cycles
   andlw   3

   // this additional code checks for the
   // page boundary and sets pclath correctly
   // ****
   movwf   _delayL
   movlw   low offset
   addwf   _delayL
   movlw   high offset
   btfsc   status,C
   addlw   1
   movwf   pclath
   movf    _delayL,w
   // ****

   addwf   pcl,f
offset:
   nop
   nop
   nop
   return
#endasm





{Original Message removed}

2000\09\15@152434 by Scott Dattalo

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flavicon
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On Fri, 15 Sep 2000, Sam Linder wrote:

{Quote hidden}

It's little more efficient to do this:




{Quote hidden}

     addlw   offset
     skpnc
      incf   pclath,f

     movwf   pcl
offset:

>     nop
>     nop
>     nop
>     return
> #endasm


Looks like 3 more cycles than the original

Scott

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2000\09\18@182020 by Sam Linder

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Where does "skpnc" come from? It's not part of the Mid-Range Instruction
Set.



-----Original Message-----
From: Scott Dattalo [KILLspamscottspamBeGonespamDATTALO.COM]
Sent: Friday, September 15, 2000 12:24 PM
To: EraseMEPICLISTspamEraseMEMITVMA.MIT.EDU
Subject: Re: [PIC]: usec delay routine


On Fri, 15 Sep 2000, Sam Linder wrote:

{Quote hidden}

It's little more efficient to do this:




{Quote hidden}

     addlw   offset
     skpnc
      incf   pclath,f

     movwf   pcl
offset:

>     nop
>     nop
>     nop
>     return
> #endasm


Looks like 3 more cycles than the original

Scott

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2000\09\18@204132 by Bob Ammerman

picon face
SKPNC is a synonym for BTFSC STATUS,C

MPASM recognizes a bunch of such special mnemonics in an attempt to make
code clearer.

Bob Ammerman
RAm Systems
(contract development of high performance, high function, low-level
software)

----- Original Message -----
From: Sam Linder <spamBeGoneSamLspamKILLspamIN-INC.COM>
To: <.....PICLISTspam_OUTspamMITVMA.MIT.EDU>
Sent: Monday, September 18, 2000 6:11 PM
Subject: Re: [PIC]: usec delay routine


> Where does "skpnc" come from? It's not part of the Mid-Range Instruction
> Set.
>
>
>
> {Original Message removed}

2000\09\18@204535 by Sam Linder

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Thanks - since I'm programming primarily in C using the Hi-Tech C Compiler,
I'm not up on MPASM.




{Original Message removed}

2000\09\19@150049 by staff

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Bob Ammerman wrote:
>
> SKPNC is a synonym for BTFSC STATUS,C
>
> MPASM recognizes a bunch of such special mnemonics in an attempt to make
> code clearer.
>
> Bob Ammerman



I especially like the skpz, skpnz, tstf etc. These are great and
really make the code easy to read. If there was one tip I had to
give to a pic newbie it would be to get used to using these
special mnemonics.

Does anyone else have home-made instructions they like to use?

I quite like:

incw
decw
setbank0
setbank1

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2000\09\19@180513 by Sam Linder

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Scott:
<snip>
It's little more efficient to do this:

     addlw   offset
     skpnc
     incf   pclath,f

     movwf   pcl
offset:<snip>

While interesting, your code suggestion doesn't work in my particular
environment. When I compile with Hi-Tech C, I get the following error
messages during the link. They are directly related to "addlw  offset":

Error[000] comomain.obj 249 : Fixup overflow in expression (loc 0x12CC
(0x12CC+0), size 1, value 0x969)
Error[000] comomain.rlf 6236 : Fixup overflow in expression (loc 0x76
(0x76+0), size 1, value 0x969)

As if that weren't enough, the compiler simply ignores "skpnc" - it doesn't
generate any errors, but also doesn't generate any code!



{Original Message removed}

2000\09\19@182143 by Sam Linder

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Scott:
Just to add a little more info to my last post:
1.      changing "addlw  offset" to "addlw  low offset" resolved the error
2.      unfortunately my original addressing problem is still not fixed
     by your suggestion - the code still vectors to the wrong place.
3.      I can easily get around the "skpnc" by reverting back to
     "btfsc status,C" which my compiler understands.

So, basically I'm back to square one. I've got a solid usec delay routine
(thanks, Andy), but still trying to work out the timing for a solid software
millisecond routine.



{Original Message removed}

2000\09\19@185304 by Bob Ammerman

picon face
Try

addlw low(offset)

or

addlw offset & 0xFF

the skpnc is really:

btfsc STATUS,C

Bob Ammerman
RAm Systems
(contract development of high performance, high function, low-level
software)


----- Original Message -----
From: Sam Linder <TakeThisOuTSamL.....spamTakeThisOuTIN-INC.COM>
To: <TakeThisOuTPICLISTKILLspamspamspamMITVMA.MIT.EDU>
Sent: Tuesday, September 19, 2000 5:56 PM
Subject: Re: [PIC]: usec delay routine


{Quote hidden}

doesn't
> generate any errors, but also doesn't generate any code!
>
>
>
> {Original Message removed}

2000\09\19@201139 by Andrew Warren

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Sam Linder <.....PICLISTspamRemoveMEMITVMA.MIT.EDU> wrote:

> As if that weren't enough, the compiler simply ignores "skpnc" -
> it doesn't generate any errors, but also doesn't generate any code!

   That's because it thinks that "skpnc" is a label.

> I've got a solid usec delay routine (thanks, Andy)....

   No problem; I live to serve.

> .... but still trying to work out the timing for a solid software
> millisecond routine.

   Why not just call the usec routine?

           MOVLW   [number of milliseconds]
           CALL    WAITMS

           ....

       WAITMS:

           MOVWF   NUMMS
           GOTO    WAITLOOP1

       WAITLOOP:

           GOTO    $+1
           GOTO    $+1
           GOTO    $+1
           NOP

       WAITLOOP1:

           MOVLW   250
           CALL    USEC
           MOVLW   250
           CALL    USEC
           MOVLW   250
           CALL    USEC
           MOVLW   240
           CALL    USEC

           DECFSZ  NUMMS
           GOTO    WAITLOOP

           RETURN

   -Andy


=== Andrew Warren --- RemoveMEaiwspamspamBeGonecypress.com
=== Cypress Semiconductor Corporation
=== Interface Products Division, S.D.
===
=== The opinions expressed above do
=== not necessarily represent those of
=== Cypress Semiconductor Corporation.

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2000\09\19@235753 by Nikolai Golovchenko

picon face
> So, basically I'm back to square one. I've got a solid usec delay routine
> (thanks, Andy), but still trying to work out the timing for a solid software
> millisecond routine.

Sam, have you tried the delay routine (delay.c/h in samples
directory of HTPIC)? Does it work?

Nikolai

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2000\09\20@112838 by Sam Linder

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Andy:
Thanks again for your assistance. I was closing in on a solution myself when
your email arrived. My code was similar to yours, but I still had a 5usec
overhead I was working on getting rid of - see code segment below. Now I
don't have to work on it any longer. You've been most helpful.

Now, you wouldn't happen to have a bit of code to help me win the lottery so
that I could retire and quit writing code, would you?

unsigned char xtempx;
#asm                        // 3usec - calling sequence
SoftDelayMsec
   movwf   _xtempx         // 1usec
sdm_loop:
   movlw   249             // \
   call    SoftDelayUsec   //  |
   movlw   249             //  |
   call    SoftDelayUsec   //   \ 997usec * _xtempx
   movlw   249             //   /
   call    SoftDelayUsec   //  |
   movlw   250             //  |
   call    SoftDelayUsec   // /
   decfsz  _xtempx         // \ 3usec * _xtempx-1
   goto    sdm_loop        // /    + 2usec

   return                  // 2 usec
#endasm

       Sam....


{Original Message removed}

2000\09\20@140203 by Sam Linder

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Nikolai wrote:
>Sam, have you tried the delay routine (delay.c/h in samples
>directory of HTPIC)? Does it work?

Yes I have - and no, it doesn't. When I tried it out, it came up with a
count of 100591 cycles. This is 591 cycles too much for me. Andy's routines
do exactly what I want - that is they generate an exact delay including the
calling sequence. Thus, when I write:

               #asm
                   movlw   99
                   call    SoftDelayMsec
               #endasm

I expect to see exactly 99000 cycles delay upon completion of the call, not
99591.

       Sam....



{Original Message removed}

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