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PICList Thread
'[PIC] 18 series SPI errors'
2005\11\19@083239 by Thomas C. Sefranek

face picon face
As per Andre's request:

I will have to dig into my archives for SPI errors for the PIC18C452.

I found a note I wrote concerning the 18F452:

Mode 1,0 is broken.
With Slave Select enabled, and slave selected (Low),
A write to SSPBUF will cause a collision!
It seems the data NEVER gets clocked out,
While the data IS clocked in successfully!

When Slave is NOT selected you will still get an interrupt every 8 clocks.

PIC18F4520:

These tests were performed on a board with 6 identical PIC18F4520s
With identical code.  In fact, identical to the SPI code I used
Successfully in the 19F452!

Mode 0,1 = No interrupt generated after 8 clocks.
Slave select was enabled, and selected for this test.
Perhaps this mode may work with slave select disabled.

Mode 1,1 = some of the Upper 6 bits do NOT show up in the SSPBUF.
Slave select was enabled, and selected for this test.
(Data sent 0X53, SSPBUF reads 0X03)
(Data sent 0X45, SSPBUF reads 0X01)
(Data sent 0XFF, SSPBUF reads 0XFF) <=== !!!
(Data sent 0X00, SSPBUF reads 0X00) <=== !!!

More tests to follow today.

 *
 |  __O    Thomas C. Sefranek  spam_OUTtcsTakeThisOuTspamcmcorp.com
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