Hi James,
Yes, for the PIC's with a 12 bit core there are only 5 bits used in
the opcode to form the address of a file register. The other 2 bits
come from bits 5 and 6 of FSR (Only bit 5 is used for 12C509).
Note also that subroutines and lookuptables has to be in the lower
half (first 256 addresses) of a program memory page (0x000-0x0ff and
0x200-0x2ff for the 12C509). Bit 9 is allways cleard with a call
instruction and instructions that modify the PC.
{Quote hidden}>
> DS40139B Page 17, Figure 4-7, suggests that bit 5 of FSR is used to
> form the bank select for direct addressing. The text doesn't
> state this, however.
>
> Does this mean that to clear, say, the register at 0x1f, one has to
> ensure that FSR bit 5 is clear?
>
> BCF FSR,5
> CLRF 1F
>
> If so, this may explain a few problems I have ... I'm using FSR to
> manage a data stack in the upper portion of bank 1, 0x30 - 0x3f.
>
> --
> James Cameron
.....quozlKILLspam
@spam@us.netrek.org http://quozl.us.netrek.org/
>
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