I think you're missing the part where it says how many Tad cycles it takes to do a conversion - ISTR
it's something of the order of ten for 8 bits, probably 12 for 10 bits.
On Sun, 8 Aug 2004 16:01:22 -0400, you wrote:
{Quote hidden}>Seeing the mess the converter made of the table I can understand your
>confusion.
>
>I might have a different version of the datasheet, as my table is titled
>"TABLE 7-1:" But either way I think the more relevant piece of information
>is in the paragraph before the table. It says:
>
>For correct conversion, the A/D conversion clock (1/TAD) must be selected
>to ensure a minimum TAD of 1.6 micro seconds.
>
>So 1.6 micro seconds is the fastest it can read a sample, regardless of
>clock frequency. So I think that works out to 625 kHz max sample speed.
>
>Using the internal A/D for a radio receiver would be interesting, but I
>think fitting it into the 1024 byte flash of the 12F675 would be more
>impressive :-)
>
>-Denny
>
>
>
>{Original Message removed}