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'Driving long shift registers'
2004\07\29@110002 by Harold Hallikainen

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I've got an application where I'm driving 90 bicolor LEDs using a 180 bit
shift register (23 TC74VHC164FT) running at 3V. The SPI output of a PIC is
driving this. Towards the far end of the shift register, I start getting
errors (bit offsets). I suspect this is ringing on the clock line causing
multiple shifts per clock, or perhaps propogation delay on the clock line
causing the output of one shift register to be sampled after the previous
bit has changed instead of before. Anyone have any suggestions on driving
long shift registers like this?

THANKS!

Harold


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2004\07\29@111625 by Cortland Setlow

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Are you sure you're using transmitting on the right edge?  Some PICs can
keep the data steady on either rising or falling edges.  You could also
change the edge, and run the clock through an inverter with a schmitt
trigger to clean it up a bit.

--Blake.

On Thu, Jul 29, 2004 at 07:59:18AM -0700, Harold Hallikainen wrote:
{Quote hidden}

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2004\07\29@112042 by Dan Smith

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On Thu, 29 Jul 2004 07:59:18 -0700, Harold Hallikainen
<.....haroldKILLspamspam.....hallikainen.com> wrote:
> I've got an application where I'm driving 90 bicolor LEDs using a 180 bit
> shift register (23 TC74VHC164FT) running at 3V. The SPI output of a PIC is
> driving this. Towards the far end of the shift register, I start getting
> errors (bit offsets).

I had the same problem with a 17C756A that was driving up to 21 x
74HC595s.  In the end I used 1 x 74HCT04 per 6 x 595s to sharpen the
clock/data/strobe lines.  Did the trick quite nicely.

Dan

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2004\07\29@112212 by David VanHorn

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At 09:59 AM 7/29/2004, Harold Hallikainen wrote:

>I've got an application where I'm driving 90 bicolor LEDs using a 180 bit
>shift register (23 TC74VHC164FT) running at 3V. The SPI output of a PIC is
>driving this. Towards the far end of the shift register, I start getting
>errors (bit offsets). I suspect this is ringing on the clock line causing
>multiple shifts per clock, or perhaps propogation delay on the clock line
>causing the output of one shift register to be sampled after the previous
>bit has changed instead of before. Anyone have any suggestions on driving
>long shift registers like this?

If it's physically long, you may need an AC coupled termination impedance.
Maybe 100 ohms or thereabouts, with 0.1uF in series.

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2004\07\29@122425 by Harold Hallikainen

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> On Thu, 29 Jul 2004 07:59:18 -0700, Harold Hallikainen
> <@spam@haroldKILLspamspamhallikainen.com> wrote:
>> I've got an application where I'm driving 90 bicolor LEDs using a 180
>> bit
>> shift register (23 TC74VHC164FT) running at 3V. The SPI output of a PIC
>> is
>> driving this. Towards the far end of the shift register, I start getting
>> errors (bit offsets).
>
> I had the same problem with a 17C756A that was driving up to 21 x
> 74HC595s.  In the end I used 1 x 74HCT04 per 6 x 595s to sharpen the
> clock/data/strobe lines.  Did the trick quite nicely.
>
> Dan

    I'm not using an output latch, just letting the LEDs flicker a bit
during updates, so I don't have a stobe line. Since the data cascades
from one chip to the next, I'm not seeing how you're using the HCT04
on that line. On the clock lines, did you have the PIC drive the
inputs of several HCT04s, then have each output drive the clock input
of 6 shift registers (distributing the clock through the T04s)?
    As someone else suggested, I'll mess around with RC termination of
the clock line. I tried just an R to ground, and that pulled the
clock too low to drive the shift registers (this whole thing runs on
3V, so the PIC ouput current is a bit limited).

THANKS!

Harold

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2004\07\29@123503 by David VanHorn

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>     As someone else suggested, I'll mess around with RC termination of
>the clock line. I tried just an R to ground, and that pulled the
>clock too low to drive the shift registers (this whole thing runs on
>3V, so the PIC ouput current is a bit limited).

That's why I suggested it.
No real current requirement, just damps the reflections.
The 100 ohms is a guess, you could literally stick a pot on it and tune for best results.

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2004\07\29@123918 by hael Rigby-Jones

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>-----Original Message-----
>From: pic microcontroller discussion list
>[spamBeGonePICLISTspamBeGonespamMITVMA.MIT.EDU] On Behalf Of David VanHorn
>Sent: 29 July 2004 17:35
>To: TakeThisOuTPICLISTEraseMEspamspam_OUTMITVMA.MIT.EDU
>Subject: Re: Driving long shift registers
>
>
>>     As someone else suggested, I'll mess around with RC
>termination of
>>the clock line. I tried just an R to ground, and that pulled
>the clock
>>too low to drive the shift registers (this whole thing runs on 3V, so
>>the PIC ouput current is a bit limited).
>
>That's why I suggested it.
>No real current requirement, just damps the reflections.
>The 100 ohms is a guess, you could literally stick a pot on it
>and tune for best results.

A low value series R in the clock line at the PIC end may also help to match
the line impedance.

Mike

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2004\07\29@124334 by David VanHorn

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>
>A low value series R in the clock line at the PIC end may also help to match
>the line impedance.

Another good idea. Just enough to slope the edges.

So many people try to fix this stuff by hanging caps on it, or driving it harder. :)

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2004\07\29@125617 by Spehro Pefhany

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At 07:59 AM 7/29/2004 -0700, you wrote:
>I've got an application where I'm driving 90 bicolor LEDs using a 180 bit
>shift register (23 TC74VHC164FT) running at 3V. The SPI output of a PIC is
>driving this. Towards the far end of the shift register, I start getting
>errors (bit offsets). I suspect this is ringing on the clock line causing
>multiple shifts per clock, or perhaps propogation delay on the clock line
>causing the output of one shift register to be sampled after the previous
>bit has changed instead of before. Anyone have any suggestions on driving
>long shift registers like this?
>
>THANKS!

Another possible problem is your grounding. If you're driving several
amperes with nanosecond edges you may be getting a lot of ground bounce
at the (physically) far end of your SR which is fouling up your clock line.
You could try feeding the clock in at the far end to see if that's the
problem.

Best regards,

Spehro Pefhany --"it's the network..."            "The Journey is the reward"
EraseMEspeffspaminterlog.com             Info for manufacturers: http://www.trexon.com
Embedded software/hardware/analog  Info for designers:  http://www.speff.com

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2004\07\29@132143 by M. Adam Davis

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Perhaps it's already clear from other comments, but you ought to lower
the signal fan out of the clock.  One pin on the PIC should not be
driving 23 devices, even if the current capability is in spec.  Use a
buffer or inverter (7404) with all the inputs connected to the clock
line and each of the 6 outputs connected to 4 chips.  If the wires are
particularily long then you may try placing resisters to ground at the
ends of the clock lines, or driving fewer chips per buffer/inverter
output.

-Adam

Harold Hallikainen wrote:

{Quote hidden}

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2004\07\29@151222 by Dan Smith

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>     I'm not using an output latch, just letting the LEDs flicker a bit
> during updates, so I don't have a stobe line. Since the data cascades
> from one chip to the next, I'm not seeing how you're using the HCT04
> on that line. On the clock lines, did you have the PIC drive the
> inputs of several HCT04s, then have each output drive the clock input
> of 6 shift registers (distributing the clock through the T04s)?

Sorry, I should have been a bit clearer.  I used a couple of the
inverters on the HCT04 back to back to form a buffer.  This way I
could buffer the clock/data/strobe lines with one HCT04.  Each line
came out of the PIC, into an HCT04, daisychained through 6 x HC595s,
then through another HCT04, daisychained through another 6 x HC595s ad
nauseum.

Dan

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