Post by thread:Looking for an easy ram buffer...

Do you really need random access? I believe IDT makes a range of FIFOs (first in first out) memories. Essentially you strobe a WRITE pin to sequentially store data and strobe a READ pin to retrieve the data which saves you the hassle of handling addressing. John Mellert EVI Inc. Columbia, MD spam_OUTjmellertNOTakeThisOuTSPAMevi-inc.com SHAWN ELLIS wrote: snip {Quote hidden}>I have a project in which I am looking to save about 1 or 2 MB of >data from an A/D in a RAM buffer. > >Can anyone recommend an easy to use RAM buffer? Money is no object >but it must: > >1. Be at least 1 or 2 MB. > >2. Use an 8 or 16 bit parallel bus (I may be flexible on that.) > >3. Be exceptionally easy to set up and interface to... No manual >refreshing! > snip

SHAWN ELLIS wrote: > Can anyone recommend an easy to use RAM buffer? Money is no object > but it must: > 1. Be at least 1 or 2 MB. > 2. Use an 8 or 16 bit parrallel bus (I may be flexable on that.) > 3. Be exceptionally easy to set up and interface to... No manual refreshing! Maybe I'm missing something, but it sounds like you want a big SRAM chip. There is a Toshiba 512Kx8 SRAM at Digi-Key (Part# TC554001FL-70-ND) for $35 and some change. It matches your requirements. Two of `em would give you a meg and four would give you... But if you don't need random access you might think about a FIFO instead. Just my opinion -- YMMV. Michael REMOVE THE .NS (NO SPAM) FROM MY ADDRESS TO REPLY ***************************************** The strong do what they have to do and the weak accept what they have to accept. --Thucydides

Shawn, other's have mentioned FIFOs but they are very expensive and very limited in size if you want to store 1-2MB. Industry-standard 512K x 8 SRAM costs around $20 (~70ns) in single quantity. The nice thing about FIFOs is that they are very easy to interface to with little or no `glue' logic. I looked at FIFOs from several vendors when I was researching my logic analyzer. IDT seems to be a clear winner as far as price and capacity. You mentioned "money was no object". In that case they have devices up to 128K. Again, they are `extremely' expensive... If you go with 512K x 8 SRAMs, you will need to generate a 20-21 Bit address and provide 2-4 chip-selects. You can easily do this in a simple CPLD or 74x family `glue' logic. - Tom At 04:58 PM 4/1/98 EST5EDT, you wrote: {Quote hidden}>Hi all, > >I have a project in which I am looking to save about 1 or 2 MB of >data from an A/D in a RAM buffer. > >Can anyone recommend an easy to use RAM buffer? Money is no object >but it must: > >1. Be at least 1 or 2 MB. > >2. Use an 8 or 16 bit parrallel bus (I may be flexable on that.) > >3. Be exceptionally easy to set up and interface to... No manual >refreshing! > >Other than that, anything will do! > >Thanks, > >

> SHAWN ELLIS wrote: > > > Can anyone recommend an easy to use RAM buffer? Money is no object > > but it must: > > > 1. Be at least 1 or 2 MB. > > > 2. Use an 8 or 16 bit parrallel bus (I may be flexable on that.) > > > 3. Be exceptionally easy to set up and interface to... No manual > refreshing! > > Maybe I'm missing something, but it sounds like you want a big SRAM chip. > > There is a Toshiba 512Kx8 SRAM at Digi-Key (Part# TC554001FL-70-ND) for $35 and > some change. It matches your requirements. Two of `em would give you a meg and > four would give you... > > But if you don't need random access you might think about a FIFO instead. > > Just my opinion -- YMMV. > > Michael > Yeah, I don't need random access, so I guess a FIFO would do... Any sugestions as to where I could look for one of those? thanks,

These have all been very interesting suggestyions... Here are my problems so far: FIFOs are too small. Even stringing them together is to complicated. DRAM's and SRAM's take too many I/O lines... Mabye I should use an IIC RAM? Does anyone know of an IIC RAM that Large? (1 - 2 MB) The suggestion to use another PIC is a good one, but I hate to add THAT much complexity to the system. Especially since there SHOULD be a RAM module out there SOMEWHERE that does IIC or SPI. FLASH RAM worries me because I don't need all the battery-backup mess, I'm not sure if it's fast enough, and I don't want to add even more complexity if I can get away with just a RAM chip... So, keep those suggestions coming, the search goes on... Thanks,

On Thu, 2 Apr 1998 17:09:34 EST5EDT SHAWN ELLIS <speKILLspamMERC.RX.UGA.EDU> writes: >These have all been very interesting suggestyions... Here are my >problems so far: Most people are taking stabs in the dark with their answers because you haven't provided enough information about the application. We need to know things like: How fast does the data need to be written and read? Is it ever read? (If not, there's no need to store it...). How often is the data re-written? Is the use mostly to write once then read very rapidly, or is it read and written rapidly? Does the data need to be saved while the power is off? How much power can the RAM sub-system use while the power is on? Are there any limits on physical space and weight? > >FIFOs are too small. Even stringing them together is to complicated. Your definition of "complicated" (is this the only major concern?) is apparently very restrictive. >DRAM's and SRAM's take too many I/O lines... Mabye I should >use an IIC RAM? Does anyone know of an IIC RAM that Large? (1 - 2 >MB) >The suggestion to use another PIC is a good one, but I hate to add >THAT much complexity to the system. Especially since there SHOULD be >a RAM module out there SOMEWHERE that does IIC or SPI. There are serial Flash ROMs (*) in this size. I don't think there are any RAMs with built in serial interface. But, Dallas Semiconductor makes adapter chips that can be connected to standard SRAMs or DRAMs to access them through a serial interface and supply backup power from a battery. Someone suggested using another PIC instead because the Dallas chips are I think more expensive than PICs and may not do exactly what's needed. >FLASH RAM worries me because I don't need all the battery-backup >mess, I'm not sure if it's fast enough, and I don't want to add even >more complexity if I can get away with just a RAM chip... (*) Flash ROM (it isn't called Flash RAM) can keep data permanently without any power at all. Batteries are required for SRAM or DRAM. However, writing the data is somewhat slow and can only be done a limited number of times before the chip literally "wears out". Reading is, for practical purposes, as fast as SRAM or DRAM and does not cause wearout. These limitations may not be a problem with your application because the current technology allows a couple hundred K per second to be written and several million writes before wearout. I think Andrew Warren or one of the other old-timers has prepared a useful table comparing the different memory technologies. >So, keep those suggestions coming, the search goes on... Based on your original requirements (cost not at all a problem, complexity a very big problem, anything else goes) I'd suggest using a PC with about 4 MB of RAM installed. Then it's just a matter of a couple of lines of C code to set up and use a 2 MB buffer. _____________________________________________________________________ You don't need to buy Internet access to use free Internet e-mail. Get completely free e-mail from Juno at http://www.juno.com Or call Juno at (800) 654-JUNO [654-5866]

SHAWN ELLIS wrote: > These have all been very interesting suggestyions... Here are my > problems so far: > > FIFOs are too small. Even stringing them together is to complicated. > > DRAM's and SRAM's take too many I/O lines... Mabye I should > use an IIC RAM? Does anyone know of an IIC RAM that Large? (1 - 2 > MB) http://www.idt.com makes a 4Mb fifo. I think it will rattle your wallet a bit though.... -- Friendly Regards Tjaart van der Walt .....tjaartKILLspam.....wasp.co.za |--------------------------------------------------| | WASP International | |R&D Engineer : GSM peripheral services development| |--------------------------------------------------| |SMS +EraseME27832123443spam_OUTTakeThisOuTsms.co.za (160 chars max)| | http://www.wasp.co.za/~tjaart/index.html | | Voice : +27-(0)11-622-8686 | | Fax : +27-(0)11-622-8973 | | WGS-84 : 26¡10.52'S 28¡06.19'E | |--------------------------------------------------|

> How fast does the data need to be written and read? Is it ever read? > (If not, there's no need to store it...). How often is the data > re-written? Is the use mostly to write once then read very rapidly, or > is it read and written rapidly? > Ok, here it is: It's a PIC1674 with an AD676 parrallel, 16-bit A/D attached. It will need to read about 60,000 samples from the A/D at 100 Hz. I'd like to be able to throw the samples into the RAM buffer in at most 1 ms. Right now I'm running low on I/O lines, so I'd like the RAM to be serial. I'm also going to add another A/D to the system, meaning not only will my timing requirements get tighter, but I'll need twice as much RAM to store the data. Anyway, the data will sit in the ram until the host PC decides to get it by RS232 from the same PIC. Given these problems, I think it is safe to say the following: I don't need or want non-volitile storage because of speed/complexity/endurance problems. I need serial interfaceing becuase of the lack of I/O lines. I need at LEAST 256 KB of RAM to store a potential 64,000 samples of two 16-bit A/D's. Any more questions, please ask... I'd like to make a decision pretty soon... Thanks for the help!

sounds like a fun little project to me. i have a question about flash rom, when they are rated at 120ns is this for the read cycle time only? can you write data that fast or does it take longer like eeprom data? michael -----Original Message----- From: Christoph Klein <KILLspamhylaKILLspamMAYN.DE> To: RemoveMEPICLISTTakeThisOuTMITVMA.MIT.EDU <spamBeGonePICLISTspamBeGoneMITVMA.MIT.EDU> Date: Friday, April 03, 1998 12:13 PM Subject: Re: Looking for an easy ram buffer... >Shawn, > >right now I am facing the same question. I am leaning towards >flash rom technology at the moment. >Anyone tips? Advice? Board layouts? Source code? ;-) > >Christoph >

On Fri, 3 Apr 1998 12:20:31 EST5EDT, you wrote: {Quote hidden}>> How fast does the data need to be written and read? Is it ever read? >> (If not, there's no need to store it...). How often is the data >> re-written? Is the use mostly to write once then read very rapidly, or >> is it read and written rapidly? >> >Ok, here it is: > >It's a PIC1674 with an AD676 parrallel, 16-bit A/D attached. It will >need to read about 60,000 samples from the A/D at 100 Hz. I'd like >to be able to throw the samples into the RAM buffer in at most 1 ms. >Right now I'm running low on I/O lines, so I'd like the RAM to be >serial. I'm also going to add another A/D to the system, meaning not >only will my timing requirements get tighter, but I'll need twice as >much RAM to store the data. Anyway, the data will sit in the ram >until the host PC decides to get it by RS232 from the same PIC. > >Given these problems, I think it is safe to say the following: > >I don't need or want non-volitile storage because of >speed/complexity/endurance problems. > >I need serial interfaceing becuase of the lack of I/O lines. > >I need at LEAST 256 KB of RAM to store a potential 64,000 samples of >two 16-bit A/D's. > >Any more questions, please ask... I'd like to make a decision pretty >soon... > >Thanks for the help! Dallas do a chip, DS1280, which interfaces a 3-wire microwire bus to up to 512K of SRAM - sounds just the job! ____ ____ _/ L_/ Mike Harrison / White Wing Logic / TakeThisOuTwwlEraseMEspam_OUTnetcomuk.co.uk _/ L_/ _/ W_/ Hardware & Software design / PCB Design / Consultancy _/ W_/ /_W_/ Industrial / Computer Peripherals / Hazardous Area /_W_/

Mike Harrison wrote: {Quote hidden}> > On Fri, 3 Apr 1998 12:20:31 EST5EDT, you wrote: > > >> How fast does the data need to be written and read? Is it ever read? > >> (If not, there's no need to store it...). How often is the data > >> re-written? Is the use mostly to write once then read very rapidly, or > >> is it read and written rapidly? > >> > >Ok, here it is: > > > >It's a PIC1674 with an AD676 parrallel, 16-bit A/D attached. It will > >need to read about 60,000 samples from the A/D at 100 Hz. I'd like > >to be able to throw the samples into the RAM buffer in at most 1 ms. > >Right now I'm running low on I/O lines, so I'd like the RAM to be > >serial. I'm also going to add another A/D to the system, meaning not > >only will my timing requirements get tighter, but I'll need twice as > >much RAM to store the data. Anyway, the data will sit in the ram > >until the host PC decides to get it by RS232 from the same PIC. > > > >Given these problems, I think it is safe to say the following: > > > >I don't need or want non-volitile storage because of > >speed/complexity/endurance problems. > > > >I need serial interfaceing becuase of the lack of I/O lines. > > > >I need at LEAST 256 KB of RAM to store a potential 64,000 samples of > >two 16-bit A/D's. > > > >Any more questions, please ask... I'd like to make a decision pretty > >soon... > > > >Thanks for the help! > Dallas do a chip, DS1280, which interfaces a 3-wire microwire bus to > up to 512K of SRAM - sounds just the job! I just realized I also have a 256K DRAM to PIC16C74A Interface project by Josef Hanzal in my dungeon as well, however I have designed with the Dallas chip in the past and it does work great and really takes the hard work out of hardware and software overhead. Don McKenzie RemoveMEdonTakeThisOuTdontronics.com http://www.dontronics.com Don's Download Dungeon http://www.dontronics.com/download.html For more details, send a blank message to infoEraseME.....dontronics.com or EraseMEsimstickdontronics.com or RemoveMEbasicsEraseMEEraseMEdontronics.com